On Tue, 2025-01-07 at 10:44 +0800, Lulu Cheng wrote: > After changing this cost from 1 to 3, the performance of spec2006 > 401 473 416 465 482 can be improved by about 2% on LA664.
Would this fix https://gcc.gnu.org/PR114978 (or at least make it latent)? > > Add option '-maddr-reg-reg-cost='. > > gcc/ChangeLog: > > * config/loongarch/genopts/loongarch.opt.in: Add > option '-maddr-reg-reg-cost='. > * config/loongarch/loongarch-def.cc > (loongarch_rtx_cost_data::loongarch_rtx_cost_data): Initialize > addr_reg_reg_cost to 3. > * config/loongarch/loongarch-opts.cc > (loongarch_target_option_override): If '-maddr-reg-reg-cost=' > is not used, set it to the initial value. > * config/loongarch/loongarch-tune.h > (struct loongarch_rtx_cost_data): Add the member > addr_reg_reg_cost and its assignment function to the structure > loongarch_rtx_cost_data. > * config/loongarch/loongarch.cc (loongarch_address_insns): > Use la_addr_reg_reg_cost to set the cost of ADDRESS_REG_REG. > * config/loongarch/loongarch.opt: Regenerate. > * config/loongarch/loongarch.opt.urls: Regenerate. > * doc/invoke.texi: Add description of '-maddr-reg-reg-cost='. > > gcc/testsuite/ChangeLog: > > * gcc.target/loongarch/const-double-zero-stx.c: Add > '-maddr-reg-reg-cost=1'. > * gcc.target/loongarch/stack-check-alloca-1.c: Likewise. > > --- > gcc/config/loongarch/genopts/loongarch.opt.in | 4 ++++ > gcc/config/loongarch/loongarch-def.cc | 1 + > gcc/config/loongarch/loongarch-opts.cc | 3 +++ > gcc/config/loongarch/loongarch-tune.h | 7 +++++++ > gcc/config/loongarch/loongarch.cc | 2 +- > gcc/config/loongarch/loongarch.opt | 4 ++++ > gcc/config/loongarch/loongarch.opt.urls | 3 +++ > gcc/doc/invoke.texi | 7 ++++++- > gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c | 2 +- > gcc/testsuite/gcc.target/loongarch/stack-check-alloca-1.c | 2 +- > 10 files changed, 31 insertions(+), 4 deletions(-) > > diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in > b/gcc/config/loongarch/genopts/loongarch.opt.in > index 8c292c8600d..39c1545e540 100644 > --- a/gcc/config/loongarch/genopts/loongarch.opt.in > +++ b/gcc/config/loongarch/genopts/loongarch.opt.in > @@ -177,6 +177,10 @@ mbranch-cost= > Target RejectNegative Joined UInteger Var(la_branch_cost) Save > -mbranch-cost=COST Set the cost of branches to roughly COST instructions. > > +maddr-reg-reg-cost= > +Target RejectNegative Joined UInteger Var(la_addr_reg_reg_cost) Save > +-maddr-reg-reg-cost=COST Set the cost of ADDRESS_REG_REG to the value > calculated by COST. > + > mcheck-zero-division > Target Mask(CHECK_ZERO_DIV) Save > Trap on integer divide by zero. > diff --git a/gcc/config/loongarch/loongarch-def.cc > b/gcc/config/loongarch/loongarch-def.cc > index b0271eb3b9a..5f235a04ef2 100644 > --- a/gcc/config/loongarch/loongarch-def.cc > +++ b/gcc/config/loongarch/loongarch-def.cc > @@ -136,6 +136,7 @@ loongarch_rtx_cost_data::loongarch_rtx_cost_data () > movcf2gr (COSTS_N_INSNS (7)), > movgr2cf (COSTS_N_INSNS (15)), > branch_cost (6), > + addr_reg_reg_cost (3), > memory_latency (4) {} > > /* The following properties cannot be looked up directly using "cpucfg". > diff --git a/gcc/config/loongarch/loongarch-opts.cc > b/gcc/config/loongarch/loongarch-opts.cc > index 36342cc9373..c2a63f75fc2 100644 > --- a/gcc/config/loongarch/loongarch-opts.cc > +++ b/gcc/config/loongarch/loongarch-opts.cc > @@ -1010,6 +1010,9 @@ loongarch_target_option_override (struct > loongarch_target *target, > if (!opts_set->x_la_branch_cost) > opts->x_la_branch_cost = loongarch_cost->branch_cost; > > + if (!opts_set->x_la_addr_reg_reg_cost) > + opts->x_la_addr_reg_reg_cost = loongarch_cost->addr_reg_reg_cost; > + > /* other stuff */ > if (ABI_LP64_P (target->abi.base)) > opts->x_flag_pcc_struct_return = 0; > diff --git a/gcc/config/loongarch/loongarch-tune.h > b/gcc/config/loongarch/loongarch-tune.h > index e69173ebf79..f7819fe7678 100644 > --- a/gcc/config/loongarch/loongarch-tune.h > +++ b/gcc/config/loongarch/loongarch-tune.h > @@ -38,6 +38,7 @@ struct loongarch_rtx_cost_data > unsigned short movcf2gr; > unsigned short movgr2cf; > unsigned short branch_cost; > + unsigned short addr_reg_reg_cost; > unsigned short memory_latency; > > /* Default RTX cost initializer, implemented in loongarch-def.cc. */ > @@ -115,6 +116,12 @@ struct loongarch_rtx_cost_data > return *this; > } > > + loongarch_rtx_cost_data addr_reg_reg_cost_ (unsigned short > _addr_reg_reg_cost) > + { > + addr_reg_reg_cost = _addr_reg_reg_cost; > + return *this; > + } > + > loongarch_rtx_cost_data memory_latency_ (unsigned short _memory_latency) > { > memory_latency = _memory_latency; > diff --git a/gcc/config/loongarch/loongarch.cc > b/gcc/config/loongarch/loongarch.cc > index 89237c377e7..d5e90bfd1e1 100644 > --- a/gcc/config/loongarch/loongarch.cc > +++ b/gcc/config/loongarch/loongarch.cc > @@ -2383,7 +2383,7 @@ loongarch_address_insns (rtx x, machine_mode mode, bool > might_split_p) > return factor; > > case ADDRESS_REG_REG: > - return factor; > + return factor * la_addr_reg_reg_cost; > > case ADDRESS_CONST_INT: > return lsx_p ? 0 : factor; > diff --git a/gcc/config/loongarch/loongarch.opt > b/gcc/config/loongarch/loongarch.opt > index b5a5e3f8f03..4d85cf5a804 100644 > --- a/gcc/config/loongarch/loongarch.opt > +++ b/gcc/config/loongarch/loongarch.opt > @@ -185,6 +185,10 @@ mbranch-cost= > Target RejectNegative Joined UInteger Var(la_branch_cost) Save > -mbranch-cost=COST Set the cost of branches to roughly COST instructions. > > +maddr-reg-reg-cost= > +Target RejectNegative Joined UInteger Var(la_addr_reg_reg_cost) Save > +-maddr-reg-reg-cost=COST Set the cost of ADDRESS_REG_REG to the value > calculated by COST. > + > mcheck-zero-division > Target Mask(CHECK_ZERO_DIV) Save > Trap on integer divide by zero. > diff --git a/gcc/config/loongarch/loongarch.opt.urls > b/gcc/config/loongarch/loongarch.opt.urls > index 571c504e61d..5f644f6c315 100644 > --- a/gcc/config/loongarch/loongarch.opt.urls > +++ b/gcc/config/loongarch/loongarch.opt.urls > @@ -27,6 +27,9 @@ UrlSuffix(gcc/LoongArch-Options.html#index-mabi-2) > mbranch-cost= > UrlSuffix(gcc/LoongArch-Options.html#index-mbranch-cost-2) > > +maddr-reg-reg-cost= > +UrlSuffix(gcc/LoongArch-Options.html#index-maddr-reg-reg-cost) > + > mcheck-zero-division > UrlSuffix(gcc/LoongArch-Options.html#index-mcheck-zero-division) > > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > index 0a7a81b2067..bca4c4da4de 100644 > --- a/gcc/doc/invoke.texi > +++ b/gcc/doc/invoke.texi > @@ -1077,7 +1077,8 @@ Objective-C and Objective-C++ Dialects}. > @gccoptlist{-march=@var{arch-type} -mtune=@var{tune-type} > -mabi=@var{base-abi-type} > -mfpu=@var{fpu-type} -msimd=@var{simd-type} > -msoft-float -msingle-float -mdouble-float -mlsx -mno-lsx -mlasx -mno-lasx > --mbranch-cost=@var{n} -mcheck-zero-division -mno-check-zero-division > +-mbranch-cost=@var{n} -maddr-reg-reg-cost=@var{n} -mcheck-zero-division > +-mno-check-zero-division > -mcond-move-int -mno-cond-move-int > -mcond-move-float -mno-cond-move-float > -memcpy -mno-memcpy -mstrict-align -mno-strict-align -G @var{num} > @@ -27543,6 +27544,10 @@ they appear on the GCC driver's command line, > deriving the final / canonicalized > @item -mbranch-cost=@var{n} > Set the cost of branches to roughly @var{n} instructions. > > +@opindex maddr-reg-reg-cost > +@item -maddr-reg-reg-cost=@var{n} > +Set the cost of ADDRESS_REG_REG to the value calculated by @var{n}. > + > @opindex mcheck-zero-division > @item -mcheck-zero-division > @itemx -mno-check-zero-divison > diff --git a/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c > b/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c > index 8fb04be8ff5..fd1bb49ff2c 100644 > --- a/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c > +++ b/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > -/* { dg-options "-O2" } */ > +/* { dg-options "-O2 -maddr-reg-reg-cost=1" } */ > /* { dg-final { scan-assembler-times {stx\..\t\$r0} 2 } } */ > > extern float arr_f[]; > diff --git a/gcc/testsuite/gcc.target/loongarch/stack-check-alloca-1.c > b/gcc/testsuite/gcc.target/loongarch/stack-check-alloca-1.c > index 6ee589c4b3d..6168461b222 100644 > --- a/gcc/testsuite/gcc.target/loongarch/stack-check-alloca-1.c > +++ b/gcc/testsuite/gcc.target/loongarch/stack-check-alloca-1.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > -/* { dg-options "-O2 -fstack-clash-protection --param > stack-clash-protection-guard-size=16" } */ > +/* { dg-options "-O2 -fstack-clash-protection --param > stack-clash-protection-guard-size=16 -maddr-reg-reg-cost=1" } */ > /* { dg-require-effective-target supports_stack_clash_protection } */ > /* { dg-require-effective-target alloca } */ > /* { dg-skip-if "" { *-*-* } { "-fstack-check" } { "" } } */ -- Xi Ruoyao <xry...@xry111.site> School of Aerospace Science and Technology, Xidian University
