在 2024/12/17 10:58, Xi Ruoyao 写道:
On Tue, 2024-12-17 at 10:41 +0800, Jiahao Xu wrote:
/* snip */
+(define_expand "cbranch<mode>4"
+ [(set (pc)
+ (if_then_else
+ (match_operator 0 "equality_operator"
+ [(match_operand:ILASX 1 "register_operand")
+ (match_operand:ILASX 2 "reg_or_vector_same_val_operand")])
+ (label_ref (match_operand 3 ""))
+ (pc)))]
+ "ISA_HAS_LASX"
+{
+ RTX_CODE code = GET_CODE (operands[0]);
+ rtx tmp = operands[1];
+ rtx const0 = CONST0_RTX (SImode);
+
+ /* If comparing against a non-zero vector we have to do a comparison first
+ so we can have a != 0 comparison with the result. */
+ if (operands[2] != CONST0_RTX (<MODE>mode))
+ {
+ rtx tmp = gen_reg_rtx (<MODE>mode);
+ emit_insn (gen_xor<mode>3 (tmp, operands[1], operands[2]));
+ }
+
+ if (code == NE)
+ emit_jump_insn (gen_lasx_xbnz_v_b (operands[3], tmp, const0));
+ else
+ emit_jump_insn (gen_lasx_xbz_v_b (operands[3], tmp, const0));
+ DONE;
+})
Do this in simd.md to avoid duplicating the same logic in lasx.md and
lsx.md? Something like
+(define_expand "cbranch<mode>4"
+ [(set (pc)
+ (if_then_else
+ (match_operator 0 "equality_operator"
+ [(match_operand:IVEC 1 "register_operand")
+ (match_operand:IVEC 2 "reg_or_vector_same_val_operand")])
+ (label_ref (match_operand 3 ""))
+ (pc)))]
+ ""
+{
+ RTX_CODE code = GET_CODE (operands[0]);
+ rtx tmp = operands[1];
+ rtx const0 = CONST0_RTX (SImode);
+
+ /* If comparing against a non-zero vector we have to do a comparison first
+ so we can have a != 0 comparison with the result. */
+ if (operands[2] != CONST0_RTX (<MODE>mode))
+ {
+ rtx tmp = gen_reg_rtx (<MODE>mode);
+ emit_insn (gen_xor<mode>3 (tmp, operands[1], operands[2]));
+ }
+
+ if (code == NE)
+ emit_jump_insn (gen_<simd_isa>_<x>bnz_v_b (operands[3], tmp, const0));
+ else
+ emit_jump_insn (gen_<simd_isa>_<x>bz_v_b (operands[3], tmp, const0));
+ DONE;
+})
(not really tested, just copied your code and modified in the mail
client to show the idea).
Looks good. I'll upload the revised version after testing.
