On Mon, Dec 16, 2024 at 5:20 PM Xi Ruoyao <xry...@xry111.site> wrote:
> A generic CRC optimization pass has been implemented in r15-5850. But > without target-specific code, it'll only optimize the CRC loop to a > table lookup. With LoongArch-specific code we can do it better: for > 64-bit LoongArch and the IEEE 802.3 polynomial or the Castagnoli > polynomial, we can directly invoke the hardware instruction; even if a > hardware instruction isn't available, we can still use LoongArch bit > reversion instructions to optimize the bit reverse before looking up the > table. > > Xi Ruoyao (5): > LoongArch: Remove QHSD and use QHWD instead > LoongArch: Add bit reverse operations > LoongArch: Add CRC expander to generate faster CRC > LoongArch: Combine xor and crc instructions > LoongArch: Add crc tests > > gcc/config/loongarch/loongarch.md | 138 +++++++++++++++++- > gcc/testsuite/g++.target/loongarch/crc-scan.C | 13 ++ > gcc/testsuite/g++.target/loongarch/crc.C | 113 ++++++++++++++ > 3 files changed, 261 insertions(+), 3 deletions(-) > create mode 100644 gcc/testsuite/g++.target/loongarch/crc-scan.C > create mode 100644 gcc/testsuite/g++.target/loongarch/crc.C > > -- > 2.47.1 > Thanks for your work. It's nice to see added support for more architectures! I’ve looked over the changes, and everything looks good to me. If any updates are needed on my side, please let me know. BR, Mariam
