On 2024-12-04 12:42, Richard Earnshaw (lists) wrote:
On 21/11/2024 19:01, Torbjörn SVENSSON wrote:
Ok for trunk and releases/gcc-14?

--

On Cortex-M4, the code generated is:
      cmp     r0, r1
      itte    ne
      lslne   r0, r0, r1
      asrne   r0, r0, #1
      moveq   r0, r1
      add     r0, r0, r1
      bx      lr

On Cortex-M7, the code generated is:
      cmp     r0, r1
      beq     .L3
      lsls    r0, r0, r1
      asrs    r0, r0, #1
      add     r0, r0, r1
      bx      lr
.L3:
      mov     r0, r1
      add     r0, r0, r1
      bx      lr

As Cortex-M7 only allow maximum one conditional instruction, force
Cortex-M4 to have a stable test case.

gcc/testsuite/ChangeLog:

        * gcc.target/arm/thumb-ifcvt.c: Use -mtune=cortex-m4.

OK.

R.

Pushed as r15-6168-ge7615f6c99f and r14.2.0-556-gcbedb3394a2.

Kind regards,
Torbjörn

Reply via email to