Ping.
On 27/11/24 10:23, Dhruv Chawla wrote:
External email: Use caution opening links or attachments
This patch modifies the intrinsic expanders to expand svlsl and svlsr to
unpredicated forms when the predicate is a ptrue. It also folds the
following pattern:
lsl <y>, <x>, <shift>
lsr <z>, <x>, <shift>
orr <r>, <y>, <z>
to:
revb/h/w <r>, <x>
when the shift amount is equal to half the bitwidth of the <x>
register.
This relies on the RTL combiners combining the "ior (ashift, ashiftrt)"
pattern to a "rotate" when the shift amount is half the element width.
In the case of the shift amount being 8, a "bswap" is generated.
While this works well, the problem is that the matchers for instructions
like SRA and ADR expect the shifts to be in an unspec form. So, to keep
matching the patterns when the unpredicated instructions are generated,
they have to be duplicated to also accept the unpredicated form. Looking
for feedback on whether this is a good way to proceed with this problem
or how to do this in a better way.
The patch was bootstrapped and regtested on aarch64-linux-gnu.
--
Regards,
Dhruv
--
Regards,
Dhruv
