From: "Mo, Zewei" <zewei...@intel.com> Hi all,
As satcvt patch is about to commit, we will move on the final patch of AVX10.2. This patch will focus on AVX10.2 minmax, vector copy and compare instructions, which is mainly Chapter 8, 11 and 14 of AVX10.2 SPEC. Reference: Intel Advanced Vector Extensions 10.2 Architecture Specification https://cdrdv2.intel.com/v1/dl/getContent/828965 All of the instructions in this patch are new instruction forms except for vmovd and vmovw, which are extended usage from the old ones. Patch descrption and changes are embedded below. Tested on x86-64-pc-linux-gnu. Ok for trunk? Nit: As mentioned in patch descrption, VMINMAXNEPBF16 will be changed to VMINMAXPBF16 eventually. Thx, Haochen --- In this patch, we will support AVX10.2 minmax, vector copy and compare instructions. This will finish the new instruction form support for AVX10.2. Most of them are new instructions forms except for vmovd and vmovw, which are extended usage from the old ones. In current documentation, it is still VMINMAXNEPBF16, but it will change to VMINMAXPBF16 eventually. gas/ChangeLog: * NEWS: Mention AVX10.2. * testsuite/gas/i386/i386.exp: Add AVX10.2 tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/avx10_2-256-miscs-intel.d: New test. * testsuite/gas/i386/avx10_2-256-miscs.d: Ditto. * testsuite/gas/i386/avx10_2-256-miscs.s: Ditto. * testsuite/gas/i386/avx10_2-512-miscs-intel.d: Ditto. * testsuite/gas/i386/avx10_2-512-miscs.d: Ditto. * testsuite/gas/i386/avx10_2-512-miscs.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-miscs.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-miscs.s: Ditto. opcodes/ChangeLog: * i386-dis-evex-len.h: Add EVEX_LEN_0F7E_P_1_W_1, EVEX_LEN_0FD6_P_2_W_0, EVEX_LEN_MAP5_6E and EVEX_LEN_MAP5_7E. * i386-dis-evex-prefix.h: Add PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F, PREFIX_EVEX_0F3A52, PREFIX_EVEX_0F3A53, PREFIX_EVEX_MAP5_2E, PREFIX_EVEX_MAP5_2F, PREFIX_EVEX_MAP5_6E and PREFIX_EVEX_MAP5_7E. * i386-dis-evex-w.h: Adjust EVEX_W_0F3A42, EVEX_W_0F7E_P_1 and EVEX_W_0FD6. Add EVEX_W_MAP5_6E_P_1 and EVEX_W_MAP5_7E_P_1. * i386-dis-evex.h: Add and adjust table entries for AVX10.2. * i386-dis.c (PREFIX_EVEX_0F2E): New. (PREFIX_EVEX_0F2F): Ditto. (PREFIX_EVEX_0F3A52): Ditto. (PREFIX_EVEX_0F3A53): Ditto. (PREFIX_EVEX_MAP5_2E): Ditto. (PREFIX_EVEX_MAP5_2F): Ditto. (PREFIX_EVEX_MAP5_6E_L_0): Ditto. (PREFIX_EVEX_MAP5_7E_L_0): Ditto. (EVEX_LEN_0F7E_P_1_W_1): Ditto. (EVEX_LEN_0FD6_P_2_W_0): Ditto. (EVEX_LEN_MAP5_6E): Ditto. (EVEX_LEN_MAP5_7E): Ditto. (EVEX_W_MAP5_6E_P_1): Ditto. (EVEX_W_MAP5_7E_P_1): Ditto. * i386-opc.tbl: Add AVX10.2 instructions. * i386-mnem.h: Regenerated. * i386-tbl.h: Ditto. Co-authored-by: Jun Zhang <jun.zh...@intel.com> Co-authored-by: Haochen Jiang <haochen.ji...@intel.com> --- gas/NEWS | 2 + .../gas/i386/avx10_2-256-miscs-intel.d | 112 + gas/testsuite/gas/i386/avx10_2-256-miscs.d | 110 + gas/testsuite/gas/i386/avx10_2-256-miscs.s | 183 + .../gas/i386/avx10_2-512-miscs-intel.d | 34 + gas/testsuite/gas/i386/avx10_2-512-miscs.d | 32 + gas/testsuite/gas/i386/avx10_2-512-miscs.s | 55 + gas/testsuite/gas/i386/i386.exp | 4 + .../gas/i386/x86-64-avx10_2-256-miscs-intel.d | 109 + .../gas/i386/x86-64-avx10_2-256-miscs.d | 107 + .../gas/i386/x86-64-avx10_2-256-miscs.s | 205 + .../gas/i386/x86-64-avx10_2-512-miscs-intel.d | 34 + .../gas/i386/x86-64-avx10_2-512-miscs.d | 32 + .../gas/i386/x86-64-avx10_2-512-miscs.s | 55 + gas/testsuite/gas/i386/x86-64.exp | 4 + opcodes/i386-dis-evex-len.h | 20 + opcodes/i386-dis-evex-prefix.h | 46 +- opcodes/i386-dis-evex-w.h | 12 +- opcodes/i386-dis-evex.h | 12 +- opcodes/i386-dis.c | 25 +- opcodes/i386-mnem.h | 4137 +++++++++-------- opcodes/i386-opc.tbl | 19 +- opcodes/i386-tbl.h | 554 ++- 23 files changed, 3644 insertions(+), 2259 deletions(-) create mode 100644 gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d create mode 100644 gas/testsuite/gas/i386/avx10_2-256-miscs.d create mode 100644 gas/testsuite/gas/i386/avx10_2-256-miscs.s create mode 100644 gas/testsuite/gas/i386/avx10_2-512-miscs-intel.d create mode 100644 gas/testsuite/gas/i386/avx10_2-512-miscs.d create mode 100644 gas/testsuite/gas/i386/avx10_2-512-miscs.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.s diff --git a/gas/NEWS b/gas/NEWS index 269b63e2056..086ba0477d3 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for the x86 Intel AVX10.2 instructions. + * Support for Nios II targets has been dropped, as the architecture has been EOL'ed by Intel. diff --git a/gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d b/gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d new file mode 100644 index 00000000000..59a202df0a9 --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d @@ -0,0 +1,112 @@ +#objdump: -dw -Mintel +#name: i386 AVX10.2/256 minmax, vector copy and compare insns (Intel disassembly) +#source: avx10_2-256-miscs.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*62 f3 57 08 52 f4 7b\s+vminmaxpbf16 xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 57 28 52 f4 7b\s+vminmaxpbf16 ymm6,ymm5,ymm4,0x7b +\s*[a-f0-9]+:\s*62 f3 57 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16 ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 38 52 31 7b\s+vminmaxpbf16 ymm6,ymm5,WORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 28 52 71 7f 7b\s+vminmaxpbf16 ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 bf 52 72 80 7b\s+vminmaxpbf16 ymm6\{k7\}\{z\},ymm5,WORD BCST \[edx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16 xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 18 52 31 7b\s+vminmaxpbf16 xmm6,xmm5,WORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 08 52 71 7f 7b\s+vminmaxpbf16 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 9f 52 72 80 7b\s+vminmaxpbf16 xmm6\{k7\}\{z\},xmm5,WORD BCST \[edx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 08 52 f4 7b\s+vminmaxpd xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 d5 28 52 f4 7b\s+vminmaxpd ymm6,ymm5,ymm4,0x7b +\s*[a-f0-9]+:\s*62 f3 d1 18 52 f4 7b\s+vminmaxpd ymm6,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 d5 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 38 52 31 7b\s+vminmaxpd ymm6,ymm5,QWORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 28 52 71 7f 7b\s+vminmaxpd ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 bf 52 72 80 7b\s+vminmaxpd ymm6\{k7\}\{z\},ymm5,QWORD BCST \[edx-0x400\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 18 52 31 7b\s+vminmaxpd xmm6,xmm5,QWORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 08 52 71 7f 7b\s+vminmaxpd xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 9f 52 72 80 7b\s+vminmaxpd xmm6\{k7\}\{z\},xmm5,QWORD BCST \[edx-0x400\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 08 52 f4 7b\s+vminmaxph xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 54 28 52 f4 7b\s+vminmaxph ymm6,ymm5,ymm4,0x7b +\s*[a-f0-9]+:\s*62 f3 50 18 52 f4 7b\s+vminmaxph ymm6,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 54 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxph ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 38 52 31 7b\s+vminmaxph ymm6,ymm5,WORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 28 52 71 7f 7b\s+vminmaxph ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 bf 52 72 80 7b\s+vminmaxph ymm6\{k7\}\{z\},ymm5,WORD BCST \[edx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxph xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 18 52 31 7b\s+vminmaxph xmm6,xmm5,WORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 08 52 71 7f 7b\s+vminmaxph xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 9f 52 72 80 7b\s+vminmaxph xmm6\{k7\}\{z\},xmm5,WORD BCST \[edx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 08 52 f4 7b\s+vminmaxps xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 55 28 52 f4 7b\s+vminmaxps ymm6,ymm5,ymm4,0x7b +\s*[a-f0-9]+:\s*62 f3 51 18 52 f4 7b\s+vminmaxps ymm6,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 55 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxps ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 38 52 31 7b\s+vminmaxps ymm6,ymm5,DWORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 28 52 71 7f 7b\s+vminmaxps ymm6,ymm5,YMMWORD PTR \[ecx\+0xfe0\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 bf 52 72 80 7b\s+vminmaxps ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxps xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 18 52 31 7b\s+vminmaxps xmm6,xmm5,DWORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 08 52 71 7f 7b\s+vminmaxps xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 9f 52 72 80 7b\s+vminmaxps xmm6\{k7\}\{z\},xmm5,DWORD BCST \[edx-0x200\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 08 53 f4 7b\s+vminmaxsd xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 d5 18 53 f4 7b\s+vminmaxsd xmm6,xmm5,xmm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 d5 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxsd xmm6\{k7\},xmm5,QWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 08 53 31 7b\s+vminmaxsd xmm6,xmm5,QWORD PTR \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 08 53 71 7f 7b\s+vminmaxsd xmm6,xmm5,QWORD PTR \[ecx\+0x3f8\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 8f 53 72 80 7b\s+vminmaxsd xmm6\{k7\}\{z\},xmm5,QWORD PTR \[edx-0x400\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 08 53 f4 7b\s+vminmaxsh xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 54 18 53 f4 7b\s+vminmaxsh xmm6,xmm5,xmm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 54 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxsh xmm6\{k7\},xmm5,WORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 08 53 31 7b\s+vminmaxsh xmm6,xmm5,WORD PTR \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 08 53 71 7f 7b\s+vminmaxsh xmm6,xmm5,WORD PTR \[ecx\+0xfe\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 8f 53 72 80 7b\s+vminmaxsh xmm6\{k7\}\{z\},xmm5,WORD PTR \[edx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 08 53 f4 7b\s+vminmaxss xmm6,xmm5,xmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 55 18 53 f4 7b\s+vminmaxss xmm6,xmm5,xmm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 55 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxss xmm6\{k7\},xmm5,DWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 08 53 31 7b\s+vminmaxss xmm6,xmm5,DWORD PTR \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 08 53 71 7f 7b\s+vminmaxss xmm6,xmm5,DWORD PTR \[ecx\+0x1fc\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 8f 53 72 80 7b\s+vminmaxss xmm6\{k7\}\{z\},xmm5,DWORD PTR \[edx-0x200\],0x7b +\s*[a-f0-9]+:\s*62 f1 7e 08 7e f5\s+vmovd xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f1 7d 08 d6 ee\s+vmovd xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f5 7e 08 6e f5\s+vmovw xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f5 7e 08 7e ee\s+vmovw xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f1 ff 08 2f f5\s+vcomxsd xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f1 ff 18 2f f5\s+vcomxsd xmm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 ff 08 2f b4 f4 00 00 00 10\s+vcomxsd xmm6,QWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f1 ff 08 2f 31\s+vcomxsd xmm6,QWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f1 ff 08 2f 71 7f\s+vcomxsd xmm6,QWORD PTR \[ecx\+0x3f8\] +\s*[a-f0-9]+:\s*62 f1 ff 08 2f 72 80\s+vcomxsd xmm6,QWORD PTR \[edx-0x400\] +\s*[a-f0-9]+:\s*62 f5 7e 08 2f f5\s+vcomxsh xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f5 7e 18 2f f5\s+vcomxsh xmm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 7e 08 2f b4 f4 00 00 00 10\s+vcomxsh xmm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f5 7e 08 2f 31\s+vcomxsh xmm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f5 7e 08 2f 71 7f\s+vcomxsh xmm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*62 f5 7e 08 2f 72 80\s+vcomxsh xmm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*62 f1 7e 08 2f f5\s+vcomxss xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f1 7e 18 2f f5\s+vcomxss xmm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 7e 08 2f b4 f4 00 00 00 10\s+vcomxss xmm6,DWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f1 7e 08 2f 31\s+vcomxss xmm6,DWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f1 7e 08 2f 71 7f\s+vcomxss xmm6,DWORD PTR \[ecx\+0x1fc\] +\s*[a-f0-9]+:\s*62 f1 7e 08 2f 72 80\s+vcomxss xmm6,DWORD PTR \[edx-0x200\] +\s*[a-f0-9]+:\s*62 f1 ff 08 2e f5\s+vucomxsd xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f1 ff 18 2e f5\s+vucomxsd xmm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 ff 08 2e b4 f4 00 00 00 10\s+vucomxsd xmm6,QWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f1 ff 08 2e 31\s+vucomxsd xmm6,QWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f1 ff 08 2e 71 7f\s+vucomxsd xmm6,QWORD PTR \[ecx\+0x3f8\] +\s*[a-f0-9]+:\s*62 f1 ff 08 2e 72 80\s+vucomxsd xmm6,QWORD PTR \[edx-0x400\] +\s*[a-f0-9]+:\s*62 f5 7e 08 2e f5\s+vucomxsh xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f5 7e 18 2e f5\s+vucomxsh xmm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 7e 08 2e b4 f4 00 00 00 10\s+vucomxsh xmm6,WORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f5 7e 08 2e 31\s+vucomxsh xmm6,WORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f5 7e 08 2e 71 7f\s+vucomxsh xmm6,WORD PTR \[ecx\+0xfe\] +\s*[a-f0-9]+:\s*62 f5 7e 08 2e 72 80\s+vucomxsh xmm6,WORD PTR \[edx-0x100\] +\s*[a-f0-9]+:\s*62 f1 7e 08 2e f5\s+vucomxss xmm6,xmm5 +\s*[a-f0-9]+:\s*62 f1 7e 18 2e f5\s+vucomxss xmm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 7e 08 2e b4 f4 00 00 00 10\s+vucomxss xmm6,DWORD PTR \[esp\+esi\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 f1 7e 08 2e 31\s+vucomxss xmm6,DWORD PTR \[ecx\] +\s*[a-f0-9]+:\s*62 f1 7e 08 2e 71 7f\s+vucomxss xmm6,DWORD PTR \[ecx\+0x1fc\] +\s*[a-f0-9]+:\s*62 f1 7e 08 2e 72 80\s+vucomxss xmm6,DWORD PTR \[edx-0x200\] +#pass diff --git a/gas/testsuite/gas/i386/avx10_2-256-miscs.d b/gas/testsuite/gas/i386/avx10_2-256-miscs.d new file mode 100644 index 00000000000..afba15f441a --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-256-miscs.d @@ -0,0 +1,110 @@ +#objdump: -dw +#name: i386 AVX10.2/256 minmax, vector copy and compare insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 f3 57 08 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 57 28 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 57 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 57 38 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%ecx\)\{1to16\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 57 28 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 57 bf 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%edx\)\{1to16\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 57 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 57 18 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%ecx\)\{1to8\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 57 08 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 57 9f 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%edx\)\{1to8\},%xmm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 d5 08 52 f4 7b\s+vminmaxpd\s\$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 d5 28 52 f4 7b\s+vminmaxpd\s\$0x7b,%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 d1 18 52 f4 7b\s+vminmaxpd\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 d5 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 d5 38 52 31 7b\s+vminmaxpd\s\$0x7b,\(%ecx\)\{1to4\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 d5 28 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 d5 bf 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 d5 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 d5 18 52 31 7b\s+vminmaxpd\s\$0x7b,\(%ecx\)\{1to2\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 d5 08 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 d5 9f 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 54 08 52 f4 7b\s+vminmaxph\s\$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 54 28 52 f4 7b\s+vminmaxph\s\$0x7b,%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 50 18 52 f4 7b\s+vminmaxph\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 54 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 54 38 52 31 7b\s+vminmaxph\s\$0x7b,\(%ecx\)\{1to16\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 54 28 52 71 7f 7b\s+vminmaxph\s\$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 54 bf 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%edx\)\{1to16\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 54 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 54 18 52 31 7b\s+vminmaxph\s\$0x7b,\(%ecx\)\{1to8\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 54 08 52 71 7f 7b\s+vminmaxph\s\$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 54 9f 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%edx\)\{1to8\},%xmm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 55 08 52 f4 7b\s+vminmaxps\s\$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 55 28 52 f4 7b\s+vminmaxps\s\$0x7b,%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 51 18 52 f4 7b\s+vminmaxps\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 55 2f 52 b4 f4 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 55 38 52 31 7b\s+vminmaxps\s\$0x7b,\(%ecx\)\{1to8\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 55 28 52 71 7f 7b\s+vminmaxps\s\$0x7b,0xfe0\(%ecx\),%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 55 bf 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 55 0f 52 b4 f4 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 55 18 52 31 7b\s+vminmaxps\s\$0x7b,\(%ecx\)\{1to4\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 55 08 52 71 7f 7b\s+vminmaxps\s\$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 55 9f 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%edx\)\{1to4\},%xmm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 d5 08 53 f4 7b\s+vminmaxsd\s\$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 d5 18 53 f4 7b\s+vminmaxsd\s\$0x7b,\{sae\},%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 d5 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxsd\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 d5 08 53 31 7b\s+vminmaxsd\s\$0x7b,\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 d5 08 53 71 7f 7b\s+vminmaxsd\s\$0x7b,0x3f8\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 d5 8f 53 72 80 7b\s+vminmaxsd\s\$0x7b,-0x400\(%edx\),%xmm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 54 08 53 f4 7b\s+vminmaxsh\s\$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 54 18 53 f4 7b\s+vminmaxsh\s\$0x7b,\{sae\},%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 54 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxsh\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 54 08 53 31 7b\s+vminmaxsh\s\$0x7b,\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 54 08 53 71 7f 7b\s+vminmaxsh\s\$0x7b,0xfe\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 54 8f 53 72 80 7b\s+vminmaxsh\s\$0x7b,-0x100\(%edx\),%xmm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 55 08 53 f4 7b\s+vminmaxss\s\$0x7b,%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 55 18 53 f4 7b\s+vminmaxss\s\$0x7b,\{sae\},%xmm4,%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 55 0f 53 b4 f4 00 00 00 10 7b\s+vminmaxss\s\$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 55 08 53 31 7b\s+vminmaxss\s\$0x7b,\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 55 08 53 71 7f 7b\s+vminmaxss\s\$0x7b,0x1fc\(%ecx\),%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f3 55 8f 53 72 80 7b\s+vminmaxss\s\$0x7b,-0x200\(%edx\),%xmm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 7e 08 7e f5\s+vmovd %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 7d 08 d6 ee\s+vmovd %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 6e f5\s+vmovw %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 7e ee\s+vmovw %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2f f5\s+vcomxsd %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 18 2f f5\s+vcomxsd \{sae\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2f b4 f4 00 00 00 10\s+vcomxsd 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2f 31\s+vcomxsd \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2f 71 7f\s+vcomxsd 0x3f8\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2f 72 80\s+vcomxsd -0x400\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2f f5\s+vcomxsh %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 18 2f f5\s+vcomxsh \{sae\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2f b4 f4 00 00 00 10\s+vcomxsh 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2f 31\s+vcomxsh \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2f 71 7f\s+vcomxsh 0xfe\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2f 72 80\s+vcomxsh -0x100\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2f f5\s+vcomxss %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 18 2f f5\s+vcomxss \{sae\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2f b4 f4 00 00 00 10\s+vcomxss 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2f 31\s+vcomxss \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2f 71 7f\s+vcomxss 0x1fc\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2f 72 80\s+vcomxss -0x200\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2e f5\s+vucomxsd %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 18 2e f5\s+vucomxsd \{sae\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2e b4 f4 00 00 00 10\s+vucomxsd 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2e 31\s+vucomxsd \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2e 71 7f\s+vucomxsd 0x3f8\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 ff 08 2e 72 80\s+vucomxsd -0x400\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2e f5\s+vucomxsh %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 18 2e f5\s+vucomxsh \{sae\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2e b4 f4 00 00 00 10\s+vucomxsh 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2e 31\s+vucomxsh \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2e 71 7f\s+vucomxsh 0xfe\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f5 7e 08 2e 72 80\s+vucomxsh -0x100\(%edx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2e f5\s+vucomxss %xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 18 2e f5\s+vucomxss \{sae\},%xmm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2e b4 f4 00 00 00 10\s+vucomxss 0x10000000\(%esp,%esi,8\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2e 31\s+vucomxss \(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2e 71 7f\s+vucomxss 0x1fc\(%ecx\),%xmm6 +\s*[a-f0-9]+:\s*62 f1 7e 08 2e 72 80\s+vucomxss -0x200\(%edx\),%xmm6 +#pass diff --git a/gas/testsuite/gas/i386/avx10_2-256-miscs.s b/gas/testsuite/gas/i386/avx10_2-256-miscs.s new file mode 100644 index 00000000000..b9218f25d73 --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-256-miscs.s @@ -0,0 +1,183 @@ +# Check 32bit AVX10.2/256 instructions + + .arch generic32 + .arch .avx10.2/256 + .text +_start: + vminmaxpbf16 $123, %xmm4, %xmm5, %xmm6 + vminmaxpbf16 $123, %ymm4, %ymm5, %ymm6 + vminmaxpbf16 $123, 0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7} + vminmaxpbf16 $123, (%ecx){1to16}, %ymm5, %ymm6 + vminmaxpbf16 $123, 4064(%ecx), %ymm5, %ymm6 + vminmaxpbf16 $123, -256(%edx){1to16}, %ymm5, %ymm6{%k7}{z} + vminmaxpbf16 $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7} + vminmaxpbf16 $123, (%ecx){1to8}, %xmm5, %xmm6 + vminmaxpbf16 $123, 2032(%ecx), %xmm5, %xmm6 + vminmaxpbf16 $123, -256(%edx){1to8}, %xmm5, %xmm6{%k7}{z} + vminmaxpd $123, %xmm4, %xmm5, %xmm6 + vminmaxpd $123, %ymm4, %ymm5, %ymm6 + vminmaxpd $123, {sae}, %ymm4, %ymm5, %ymm6 + vminmaxpd $123, 0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7} + vminmaxpd $123, (%ecx){1to4}, %ymm5, %ymm6 + vminmaxpd $123, 4064(%ecx), %ymm5, %ymm6 + vminmaxpd $123, -1024(%edx){1to4}, %ymm5, %ymm6{%k7}{z} + vminmaxpd $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7} + vminmaxpd $123, (%ecx){1to2}, %xmm5, %xmm6 + vminmaxpd $123, 2032(%ecx), %xmm5, %xmm6 + vminmaxpd $123, -1024(%edx){1to2}, %xmm5, %xmm6{%k7}{z} + vminmaxph $123, %xmm4, %xmm5, %xmm6 + vminmaxph $123, %ymm4, %ymm5, %ymm6 + vminmaxph $123, {sae}, %ymm4, %ymm5, %ymm6 + vminmaxph $123, 0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7} + vminmaxph $123, (%ecx){1to16}, %ymm5, %ymm6 + vminmaxph $123, 4064(%ecx), %ymm5, %ymm6 + vminmaxph $123, -256(%edx){1to16}, %ymm5, %ymm6{%k7}{z} + vminmaxph $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7} + vminmaxph $123, (%ecx){1to8}, %xmm5, %xmm6 + vminmaxph $123, 2032(%ecx), %xmm5, %xmm6 + vminmaxph $123, -256(%edx){1to8}, %xmm5, %xmm6{%k7}{z} + vminmaxps $123, %xmm4, %xmm5, %xmm6 + vminmaxps $123, %ymm4, %ymm5, %ymm6 + vminmaxps $123, {sae}, %ymm4, %ymm5, %ymm6 + vminmaxps $123, 0x10000000(%esp, %esi, 8), %ymm5, %ymm6{%k7} + vminmaxps $123, (%ecx){1to8}, %ymm5, %ymm6 + vminmaxps $123, 4064(%ecx), %ymm5, %ymm6 + vminmaxps $123, -512(%edx){1to8}, %ymm5, %ymm6{%k7}{z} + vminmaxps $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7} + vminmaxps $123, (%ecx){1to4}, %xmm5, %xmm6 + vminmaxps $123, 2032(%ecx), %xmm5, %xmm6 + vminmaxps $123, -512(%edx){1to4}, %xmm5, %xmm6{%k7}{z} + vminmaxsd $123, %xmm4, %xmm5, %xmm6 + vminmaxsd $123, {sae}, %xmm4, %xmm5, %xmm6 + vminmaxsd $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7} + vminmaxsd $123, (%ecx), %xmm5, %xmm6 + vminmaxsd $123, 1016(%ecx), %xmm5, %xmm6 + vminmaxsd $123, -1024(%edx), %xmm5, %xmm6{%k7}{z} + vminmaxsh $123, %xmm4, %xmm5, %xmm6 + vminmaxsh $123, {sae}, %xmm4, %xmm5, %xmm6 + vminmaxsh $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7} + vminmaxsh $123, (%ecx), %xmm5, %xmm6 + vminmaxsh $123, 254(%ecx), %xmm5, %xmm6 + vminmaxsh $123, -256(%edx), %xmm5, %xmm6{%k7}{z} + vminmaxss $123, %xmm4, %xmm5, %xmm6 + vminmaxss $123, {sae}, %xmm4, %xmm5, %xmm6 + vminmaxss $123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7} + vminmaxss $123, (%ecx), %xmm5, %xmm6 + vminmaxss $123, 508(%ecx), %xmm5, %xmm6 + vminmaxss $123, -512(%edx), %xmm5, %xmm6{%k7}{z} + + vmovd %xmm5, %xmm6 + vmovd.s %xmm5, %xmm6 + vmovw %xmm5, %xmm6 + vmovw.s %xmm5, %xmm6 + + .irp m, "", u + v\m\()comxsd %xmm5, %xmm6 + v\m\()comxsd {sae}, %xmm5, %xmm6 + v\m\()comxsd 0x10000000(%esp, %esi, 8), %xmm6 + v\m\()comxsd (%ecx), %xmm6 + v\m\()comxsd 1016(%ecx), %xmm6 + v\m\()comxsd -1024(%edx), %xmm6 + v\m\()comxsh %xmm5, %xmm6 + v\m\()comxsh {sae}, %xmm5, %xmm6 + v\m\()comxsh 0x10000000(%esp, %esi, 8), %xmm6 + v\m\()comxsh (%ecx), %xmm6 + v\m\()comxsh 254(%ecx), %xmm6 + v\m\()comxsh -256(%edx), %xmm6 + v\m\()comxss %xmm5, %xmm6 + v\m\()comxss {sae}, %xmm5, %xmm6 + v\m\()comxss 0x10000000(%esp, %esi, 8), %xmm6 + v\m\()comxss (%ecx), %xmm6 + v\m\()comxss 508(%ecx), %xmm6 + v\m\()comxss -512(%edx), %xmm6 + .endr + +_intel: + .intel_syntax noprefix + vminmaxpbf16 xmm6, xmm5, xmm4, 123 + vminmaxpbf16 ymm6, ymm5, ymm4, 123 + vminmaxpbf16 ymm6{k7}, ymm5, [esp+esi*8+0x10000000], 123 + vminmaxpbf16 ymm6, ymm5, [ecx]{1to16}, 123 + vminmaxpbf16 ymm6, ymm5, YMMWORD PTR [ecx+4064], 123 + vminmaxpbf16 ymm6{k7}{z}, ymm5, WORD PTR [edx-256]{1to16}, 123 + vminmaxpbf16 xmm6{k7}, xmm5, [esp+esi*8+0x10000000], 123 + vminmaxpbf16 xmm6, xmm5, [ecx]{1to8}, 123 + vminmaxpbf16 xmm6, xmm5, XMMWORD PTR [ecx+2032], 123 + vminmaxpbf16 xmm6{k7}{z}, xmm5, WORD PTR [edx-256]{1to8}, 123 + vminmaxpd xmm6, xmm5, xmm4, 123 + vminmaxpd ymm6, ymm5, ymm4, 123 + vminmaxpd ymm6, ymm5, ymm4, {sae}, 123 + vminmaxpd ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000], 123 + vminmaxpd ymm6, ymm5, QWORD PTR [ecx]{1to4}, 123 + vminmaxpd ymm6, ymm5, [ecx+4064], 123 + vminmaxpd ymm6{k7}{z}, ymm5, [edx-1024]{1to4}, 123 + vminmaxpd xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000], 123 + vminmaxpd xmm6, xmm5, QWORD PTR [ecx]{1to2}, 123 + vminmaxpd xmm6, xmm5, [ecx+2032], 123 + vminmaxpd xmm6{k7}{z}, xmm5, [edx-1024]{1to2}, 123 + vminmaxph xmm6, xmm5, xmm4, 123 + vminmaxph ymm6, ymm5, ymm4, 123 + vminmaxph ymm6, ymm5, ymm4, {sae}, 123 + vminmaxph ymm6{k7}, ymm5, [esp+esi*8+0x10000000], 123 + vminmaxph ymm6, ymm5, [ecx]{1to16}, 123 + vminmaxph ymm6, ymm5, YMMWORD PTR [ecx+4064], 123 + vminmaxph ymm6{k7}{z}, ymm5, WORD PTR [edx-256]{1to16}, 123 + vminmaxph xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000], 123 + vminmaxph xmm6, xmm5, WORD PTR [ecx]{1to8}, 123 + vminmaxph xmm6, xmm5, [ecx+2032], 123 + vminmaxph xmm6{k7}{z}, xmm5, [edx-256]{1to8}, 123 + vminmaxps xmm6, xmm5, xmm4, 123 + vminmaxps ymm6, ymm5, ymm4, 123 + vminmaxps ymm6, ymm5, ymm4, {sae}, 123 + vminmaxps ymm6{k7}, ymm5, YMMWORD PTR [esp+esi*8+0x10000000], 123 + vminmaxps ymm6, ymm5, DWORD PTR [ecx]{1to8}, 123 + vminmaxps ymm6, ymm5, [ecx+4064], 123 + vminmaxps ymm6{k7}{z}, ymm5, [edx-512]{1to8}, 123 + vminmaxps xmm6{k7}, xmm5, [esp+esi*8+0x10000000], 123 + vminmaxps xmm6, xmm5, [ecx]{1to4}, 123 + vminmaxps xmm6, xmm5, XMMWORD PTR [ecx+2032], 123 + vminmaxps xmm6{k7}{z}, xmm5, DWORD PTR [edx-512]{1to4}, 123 + vminmaxsd xmm6, xmm5, xmm4, 123 + vminmaxsd xmm6, xmm5, xmm4, {sae}, 123 + vminmaxsd xmm6{k7}, xmm5, [esp+esi*8+0x10000000], 123 + vminmaxsd xmm6, xmm5, QWORD PTR [ecx], 123 + vminmaxsd xmm6, xmm5, [ecx+1016], 123 + vminmaxsd xmm6{k7}{z}, xmm5, QWORD PTR [edx-1024], 123 + vminmaxsh xmm6, xmm5, xmm4, 123 + vminmaxsh xmm6, xmm5, xmm4, {sae}, 123 + vminmaxsh xmm6{k7}, xmm5, WORD PTR [esp+esi*8+0x10000000], 123 + vminmaxsh xmm6, xmm5, [ecx], 123 + vminmaxsh xmm6, xmm5, [ecx+254], 123 + vminmaxsh xmm6{k7}{z}, xmm5, WORD PTR [edx-256], 123 + vminmaxss xmm6, xmm5, xmm4, 123 + vminmaxss xmm6, xmm5, xmm4, {sae}, 123 + vminmaxss xmm6{k7}, xmm5, DWORD PTR [esp+esi*8+0x10000000], 123 + vminmaxss xmm6, xmm5, [ecx], 123 + vminmaxss xmm6, xmm5, DWORD PTR [ecx+508], 123 + vminmaxss xmm6{k7}{z}, xmm5, [edx-512], 123 + + vmovd xmm6, xmm5 + vmovd.s xmm6, xmm5 + vmovw xmm6, xmm5 + vmovw.s xmm6, xmm5 + + .irp m, "", u + v\m\()comxsd xmm6, xmm5 + v\m\()comxsd xmm6, xmm5, {sae} + v\m\()comxsd xmm6, [esp+esi*8+0x10000000] + v\m\()comxsd xmm6, QWORD PTR [ecx] + v\m\()comxsd xmm6, [ecx+1016] + v\m\()comxsd xmm6, QWORD PTR [edx-1024] + v\m\()comxsh xmm6, xmm5 + v\m\()comxsh xmm6, xmm5, {sae} + v\m\()comxsh xmm6, WORD PTR [esp+esi*8+0x10000000] + v\m\()comxsh xmm6, [ecx] + v\m\()comxsh xmm6, [ecx+254] + v\m\()comxsh xmm6, WORD PTR [edx-256] + v\m\()comxss xmm6, xmm5 + v\m\()comxss xmm6, xmm5, {sae} + v\m\()comxss xmm6, DWORD PTR [esp+esi*8+0x10000000] + v\m\()comxss xmm6, [ecx] + v\m\()comxss xmm6, DWORD PTR [ecx+508] + v\m\()comxss xmm6, [edx-512] + .endr diff --git a/gas/testsuite/gas/i386/avx10_2-512-miscs-intel.d b/gas/testsuite/gas/i386/avx10_2-512-miscs-intel.d new file mode 100644 index 00000000000..a8a4600e47f --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-512-miscs-intel.d @@ -0,0 +1,34 @@ +#objdump: -dw -Mintel +#name: i386 AVX10.2/512 minmax insns (Intel disassembly) +#source: avx10_2-512-miscs.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*62 f3 57 48 52 f4 7b\s+vminmaxpbf16 zmm6,zmm5,zmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 57 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16 zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 58 52 31 7b\s+vminmaxpbf16 zmm6,zmm5,WORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 48 52 71 7f 7b\s+vminmaxpbf16 zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b +\s*[a-f0-9]+:\s*62 f3 57 df 52 72 80 7b\s+vminmaxpbf16 zmm6\{k7\}\{z\},zmm5,WORD BCST \[edx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 48 52 f4 7b\s+vminmaxpd zmm6,zmm5,zmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 d5 18 52 f4 7b\s+vminmaxpd zmm6,zmm5,zmm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 d5 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 58 52 31 7b\s+vminmaxpd zmm6,zmm5,QWORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 48 52 71 7f 7b\s+vminmaxpd zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b +\s*[a-f0-9]+:\s*62 f3 d5 df 52 72 80 7b\s+vminmaxpd zmm6\{k7\}\{z\},zmm5,QWORD BCST \[edx-0x400\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 48 52 f4 7b\s+vminmaxph zmm6,zmm5,zmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 54 18 52 f4 7b\s+vminmaxph zmm6,zmm5,zmm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 54 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxph zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 58 52 31 7b\s+vminmaxph zmm6,zmm5,WORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 48 52 71 7f 7b\s+vminmaxph zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b +\s*[a-f0-9]+:\s*62 f3 54 df 52 72 80 7b\s+vminmaxph zmm6\{k7\}\{z\},zmm5,WORD BCST \[edx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 48 52 f4 7b\s+vminmaxps zmm6,zmm5,zmm4,0x7b +\s*[a-f0-9]+:\s*62 f3 55 18 52 f4 7b\s+vminmaxps zmm6,zmm5,zmm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 55 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxps zmm6\{k7\},zmm5,ZMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 58 52 31 7b\s+vminmaxps zmm6,zmm5,DWORD BCST \[ecx\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 48 52 71 7f 7b\s+vminmaxps zmm6,zmm5,ZMMWORD PTR \[ecx\+0x1fc0\],0x7b +\s*[a-f0-9]+:\s*62 f3 55 df 52 72 80 7b\s+vminmaxps zmm6\{k7\}\{z\},zmm5,DWORD BCST \[edx-0x200\],0x7b +#pass diff --git a/gas/testsuite/gas/i386/avx10_2-512-miscs.d b/gas/testsuite/gas/i386/avx10_2-512-miscs.d new file mode 100644 index 00000000000..07a63fdb6fa --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-512-miscs.d @@ -0,0 +1,32 @@ +#objdump: -dw +#name: i386 AVX10.2/512 minmax insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 f3 57 48 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%zmm4,%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 57 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 57 58 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%ecx\)\{1to32\},%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 57 48 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 57 df 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%edx\)\{1to32\},%zmm5,%zmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 d5 48 52 f4 7b\s+vminmaxpd\s\$0x7b,%zmm4,%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 d5 18 52 f4 7b\s+vminmaxpd\s\$0x7b,\{sae\},%zmm4,%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 d5 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 d5 58 52 31 7b\s+vminmaxpd\s\$0x7b,\(%ecx\)\{1to8\},%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 d5 48 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 d5 df 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%edx\)\{1to8\},%zmm5,%zmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 54 48 52 f4 7b\s+vminmaxph\s\$0x7b,%zmm4,%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 54 18 52 f4 7b\s+vminmaxph\s\$0x7b,\{sae\},%zmm4,%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 54 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 54 58 52 31 7b\s+vminmaxph\s\$0x7b,\(%ecx\)\{1to32\},%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 54 48 52 71 7f 7b\s+vminmaxph\s\$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 54 df 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%edx\)\{1to32\},%zmm5,%zmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 55 48 52 f4 7b\s+vminmaxps\s\$0x7b,%zmm4,%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 55 18 52 f4 7b\s+vminmaxps\s\$0x7b,\{sae\},%zmm4,%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 55 4f 52 b4 f4 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%esp,%esi,8\),%zmm5,%zmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 55 58 52 31 7b\s+vminmaxps\s\$0x7b,\(%ecx\)\{1to16\},%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 55 48 52 71 7f 7b\s+vminmaxps\s\$0x7b,0x1fc0\(%ecx\),%zmm5,%zmm6 +\s*[a-f0-9]+:\s*62 f3 55 df 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%edx\)\{1to16\},%zmm5,%zmm6\{%k7\}\{z\} +#pass diff --git a/gas/testsuite/gas/i386/avx10_2-512-miscs.s b/gas/testsuite/gas/i386/avx10_2-512-miscs.s new file mode 100644 index 00000000000..78962dcff52 --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-512-miscs.s @@ -0,0 +1,55 @@ +# Check 32bit AVX10.2/512 instructions + + .arch generic32 + .arch .avx10.2/512 + .text +_start: + vminmaxpbf16 $123, %zmm4, %zmm5, %zmm6 + vminmaxpbf16 $123, 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7} + vminmaxpbf16 $123, (%ecx){1to32}, %zmm5, %zmm6 + vminmaxpbf16 $123, 8128(%ecx), %zmm5, %zmm6 + vminmaxpbf16 $123, -256(%edx){1to32}, %zmm5, %zmm6{%k7}{z} + vminmaxpd $123, %zmm4, %zmm5, %zmm6 + vminmaxpd $123, {sae}, %zmm4, %zmm5, %zmm6 + vminmaxpd $123, 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7} + vminmaxpd $123, (%ecx){1to8}, %zmm5, %zmm6 + vminmaxpd $123, 8128(%ecx), %zmm5, %zmm6 + vminmaxpd $123, -1024(%edx){1to8}, %zmm5, %zmm6{%k7}{z} + vminmaxph $123, %zmm4, %zmm5, %zmm6 + vminmaxph $123, {sae}, %zmm4, %zmm5, %zmm6 + vminmaxph $123, 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7} + vminmaxph $123, (%ecx){1to32}, %zmm5, %zmm6 + vminmaxph $123, 8128(%ecx), %zmm5, %zmm6 + vminmaxph $123, -256(%edx){1to32}, %zmm5, %zmm6{%k7}{z} + vminmaxps $123, %zmm4, %zmm5, %zmm6 + vminmaxps $123, {sae}, %zmm4, %zmm5, %zmm6 + vminmaxps $123, 0x10000000(%esp, %esi, 8), %zmm5, %zmm6{%k7} + vminmaxps $123, (%ecx){1to16}, %zmm5, %zmm6 + vminmaxps $123, 8128(%ecx), %zmm5, %zmm6 + vminmaxps $123, -512(%edx){1to16}, %zmm5, %zmm6{%k7}{z} + +_intel: + .intel_syntax noprefix + vminmaxpbf16 zmm6, zmm5, zmm4, 123 + vminmaxpbf16 zmm6{k7}, zmm5, [esp+esi*8+0x10000000], 123 + vminmaxpbf16 zmm6, zmm5, [ecx]{1to32}, 123 + vminmaxpbf16 zmm6, zmm5, ZMMWORD PTR [ecx+8128], 123 + vminmaxpbf16 zmm6{k7}{z}, zmm5, WORD PTR [edx-256]{1to32}, 123 + vminmaxpd zmm6, zmm5, zmm4, 123 + vminmaxpd zmm6, zmm5, zmm4, {sae}, 123 + vminmaxpd zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000], 123 + vminmaxpd zmm6, zmm5, QWORD PTR [ecx]{1to8}, 123 + vminmaxpd zmm6, zmm5, [ecx+8128], 123 + vminmaxpd zmm6{k7}{z}, zmm5, [edx-1024]{1to8}, 123 + vminmaxph zmm6, zmm5, zmm4, 123 + vminmaxph zmm6, zmm5, zmm4, {sae}, 123 + vminmaxph zmm6{k7}, zmm5, [esp+esi*8+0x10000000], 123 + vminmaxph zmm6, zmm5, WORD PTR [ecx]{1to32}, 123 + vminmaxph zmm6, zmm5, ZMMWORD PTR [ecx+8128], 123 + vminmaxph zmm6{k7}{z}, zmm5, [edx-256]{1to32}, 123 + vminmaxps zmm6, zmm5, zmm4, 123 + vminmaxps zmm6, zmm5, zmm4, {sae}, 123 + vminmaxps zmm6{k7}, zmm5, ZMMWORD PTR [esp+esi*8+0x10000000], 123 + vminmaxps zmm6, zmm5, [ecx]{1to16}, 123 + vminmaxps zmm6, zmm5, [ecx+8128], 123 + vminmaxps zmm6{k7}{z}, zmm5, DWORD PTR [edx-512]{1to16}, 123 diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index b5a0b48f32f..f66c61eed11 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -531,6 +531,10 @@ if [gas_32_check] then { run_dump_test "avx10_2-512-satcvt-intel" run_dump_test "avx10_2-256-satcvt" run_dump_test "avx10_2-256-satcvt-intel" + run_dump_test "avx10_2-512-miscs" + run_dump_test "avx10_2-512-miscs-intel" + run_dump_test "avx10_2-256-miscs" + run_dump_test "avx10_2-256-miscs-intel" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d new file mode 100644 index 00000000000..7855f2d3a75 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d @@ -0,0 +1,109 @@ +#objdump: -dw -Mintel +#name: x86_64 AVX10.2/256 minmax, vector copy and compare insns (Intel disassembly) +#source: x86-64-avx10_2-256-miscs.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*62 03 17 00 52 f4 7b\s+vminmaxpbf16 xmm30,xmm29,xmm28,0x7b +\s*[a-f0-9]+:\s*62 03 17 20 52 f4 7b\s+vminmaxpbf16 ymm30,ymm29,ymm28,0x7b +\s*[a-f0-9]+:\s*62 23 17 27 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16 ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 17 30 52 31 7b\s+vminmaxpbf16 ymm30,ymm29,WORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 17 20 52 71 7f 7b\s+vminmaxpbf16 ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b +\s*[a-f0-9]+:\s*62 63 17 b7 52 72 80 7b\s+vminmaxpbf16 ymm30\{k7\}\{z\},ymm29,WORD BCST \[rdx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 23 17 07 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16 xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 17 10 52 31 7b\s+vminmaxpbf16 xmm30,xmm29,WORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 17 00 52 71 7f 7b\s+vminmaxpbf16 xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*62 63 17 97 52 72 80 7b\s+vminmaxpbf16 xmm30\{k7\}\{z\},xmm29,WORD BCST \[rdx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 03 95 00 52 f4 7b\s+vminmaxpd xmm30,xmm29,xmm28,0x7b +\s*[a-f0-9]+:\s*62 03 95 20 52 f4 7b\s+vminmaxpd ymm30,ymm29,ymm28,0x7b +\s*[a-f0-9]+:\s*62 23 95 27 52 b4 f5 00 00 00 10 7b\s+vminmaxpd ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 95 30 52 31 7b\s+vminmaxpd ymm30,ymm29,QWORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 95 20 52 71 7f 7b\s+vminmaxpd ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b +\s*[a-f0-9]+:\s*62 63 95 b7 52 72 80 7b\s+vminmaxpd ymm30\{k7\}\{z\},ymm29,QWORD BCST \[rdx-0x400\],0x7b +\s*[a-f0-9]+:\s*62 23 95 07 52 b4 f5 00 00 00 10 7b\s+vminmaxpd xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 95 10 52 31 7b\s+vminmaxpd xmm30,xmm29,QWORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 95 00 52 71 7f 7b\s+vminmaxpd xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*62 63 95 97 52 72 80 7b\s+vminmaxpd xmm30\{k7\}\{z\},xmm29,QWORD BCST \[rdx-0x400\],0x7b +\s*[a-f0-9]+:\s*62 03 14 00 52 f4 7b\s+vminmaxph xmm30,xmm29,xmm28,0x7b +\s*[a-f0-9]+:\s*62 03 14 20 52 f4 7b\s+vminmaxph ymm30,ymm29,ymm28,0x7b +\s*[a-f0-9]+:\s*62 23 14 27 52 b4 f5 00 00 00 10 7b\s+vminmaxph ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 14 30 52 31 7b\s+vminmaxph ymm30,ymm29,WORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 14 20 52 71 7f 7b\s+vminmaxph ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b +\s*[a-f0-9]+:\s*62 63 14 b7 52 72 80 7b\s+vminmaxph ymm30\{k7\}\{z\},ymm29,WORD BCST \[rdx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 23 14 07 52 b4 f5 00 00 00 10 7b\s+vminmaxph xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 14 10 52 31 7b\s+vminmaxph xmm30,xmm29,WORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 14 00 52 71 7f 7b\s+vminmaxph xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*62 63 14 97 52 72 80 7b\s+vminmaxph xmm30\{k7\}\{z\},xmm29,WORD BCST \[rdx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 03 15 00 52 f4 7b\s+vminmaxps xmm30,xmm29,xmm28,0x7b +\s*[a-f0-9]+:\s*62 03 15 20 52 f4 7b\s+vminmaxps ymm30,ymm29,ymm28,0x7b +\s*[a-f0-9]+:\s*62 23 15 27 52 b4 f5 00 00 00 10 7b\s+vminmaxps ymm30\{k7\},ymm29,YMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 15 30 52 31 7b\s+vminmaxps ymm30,ymm29,DWORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 15 20 52 71 7f 7b\s+vminmaxps ymm30,ymm29,YMMWORD PTR \[rcx\+0xfe0\],0x7b +\s*[a-f0-9]+:\s*62 63 15 b7 52 72 80 7b\s+vminmaxps ymm30\{k7\}\{z\},ymm29,DWORD BCST \[rdx-0x200\],0x7b +\s*[a-f0-9]+:\s*62 23 15 07 52 b4 f5 00 00 00 10 7b\s+vminmaxps xmm30\{k7\},xmm29,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 15 10 52 31 7b\s+vminmaxps xmm30,xmm29,DWORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 15 00 52 71 7f 7b\s+vminmaxps xmm30,xmm29,XMMWORD PTR \[rcx\+0x7f0\],0x7b +\s*[a-f0-9]+:\s*62 63 15 97 52 72 80 7b\s+vminmaxps xmm30\{k7\}\{z\},xmm29,DWORD BCST \[rdx-0x200\],0x7b +\s*[a-f0-9]+:\s*62 03 95 00 53 f4 7b\s+vminmaxsd xmm30,xmm29,xmm28,0x7b +\s*[a-f0-9]+:\s*62 03 95 10 53 f4 7b\s+vminmaxsd xmm30,xmm29,xmm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 23 95 07 53 b4 f5 00 00 00 10 7b\s+vminmaxsd xmm30\{k7\},xmm29,QWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 95 00 53 31 7b\s+vminmaxsd xmm30,xmm29,QWORD PTR \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 95 00 53 71 7f 7b\s+vminmaxsd xmm30,xmm29,QWORD PTR \[rcx\+0x3f8\],0x7b +\s*[a-f0-9]+:\s*62 63 95 87 53 72 80 7b\s+vminmaxsd xmm30\{k7\}\{z\},xmm29,QWORD PTR \[rdx-0x400\],0x7b +\s*[a-f0-9]+:\s*62 03 14 00 53 f4 7b\s+vminmaxsh xmm30,xmm29,xmm28,0x7b +\s*[a-f0-9]+:\s*62 03 14 10 53 f4 7b\s+vminmaxsh xmm30,xmm29,xmm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 23 14 07 53 b4 f5 00 00 00 10 7b\s+vminmaxsh xmm30\{k7\},xmm29,WORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 14 00 53 31 7b\s+vminmaxsh xmm30,xmm29,WORD PTR \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 14 00 53 71 7f 7b\s+vminmaxsh xmm30,xmm29,WORD PTR \[rcx\+0xfe\],0x7b +\s*[a-f0-9]+:\s*62 63 14 87 53 72 80 7b\s+vminmaxsh xmm30\{k7\}\{z\},xmm29,WORD PTR \[rdx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 03 15 00 53 f4 7b\s+vminmaxss xmm30,xmm29,xmm28,0x7b +\s*[a-f0-9]+:\s*62 03 15 10 53 f4 7b\s+vminmaxss xmm30,xmm29,xmm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 23 15 07 53 b4 f5 00 00 00 10 7b\s+vminmaxss xmm30\{k7\},xmm29,DWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 15 00 53 31 7b\s+vminmaxss xmm30,xmm29,DWORD PTR \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 15 00 53 71 7f 7b\s+vminmaxss xmm30,xmm29,DWORD PTR \[rcx\+0x1fc\],0x7b +\s*[a-f0-9]+:\s*62 63 15 87 53 72 80 7b\s+vminmaxss xmm30\{k7\}\{z\},xmm29,DWORD PTR \[rdx-0x200\],0x7b +\s*[a-f0-9]+:\s*62 01 7e 08 7e f5\s+vmovd xmm30,xmm29 +\s*[a-f0-9]+:\s*62 01 7d 08 d6 ee\s+vmovd xmm30,xmm29 +\s*[a-f0-9]+:\s*62 05 7e 08 6e f5\s+vmovw xmm30,xmm29 +\s*[a-f0-9]+:\s*62 05 7e 08 7e ee\s+vmovw xmm30,xmm29 +\s*[a-f0-9]+:\s*62 01 ff 08 2f f5\s+vcomxsd xmm30,xmm29 +\s*[a-f0-9]+:\s*62 01 ff 18 2f f5\s+vcomxsd xmm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 21 ff 08 2f b4 f5 00 00 00 10\s+vcomxsd xmm30,QWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 41 ff 08 2f 31\s+vcomxsd xmm30,QWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 61 ff 08 2f 71 7f\s+vcomxsd xmm30,QWORD PTR \[rcx\+0x3f8\] +\s*[a-f0-9]+:\s*62 61 ff 08 2f 72 80\s+vcomxsd xmm30,QWORD PTR \[rdx-0x400\] +\s*[a-f0-9]+:\s*62 05 7e 08 2f f5\s+vcomxsh xmm30,xmm29 +\s*[a-f0-9]+:\s*62 05 7e 18 2f f5\s+vcomxsh xmm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 25 7e 08 2f b4 f5 00 00 00 10\s+vcomxsh xmm30,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 7e 08 2f 31\s+vcomxsh xmm30,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 7e 08 2f 71 7f\s+vcomxsh xmm30,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*62 65 7e 08 2f 72 80\s+vcomxsh xmm30,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*62 01 7e 08 2f f5\s+vcomxss xmm30,xmm29 +\s*[a-f0-9]+:\s*62 01 7e 18 2f f5\s+vcomxss xmm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 21 7e 08 2f b4 f5 00 00 00 10\s+vcomxss xmm30,DWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 41 7e 08 2f 31\s+vcomxss xmm30,DWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 61 7e 08 2f 71 7f\s+vcomxss xmm30,DWORD PTR \[rcx\+0x1fc\] +\s*[a-f0-9]+:\s*62 61 7e 08 2f 72 80\s+vcomxss xmm30,DWORD PTR \[rdx-0x200\] +\s*[a-f0-9]+:\s*62 01 ff 08 2e f5\s+vucomxsd xmm30,xmm29 +\s*[a-f0-9]+:\s*62 01 ff 18 2e f5\s+vucomxsd xmm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 21 ff 08 2e b4 f5 00 00 00 10\s+vucomxsd xmm30,QWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 41 ff 08 2e 31\s+vucomxsd xmm30,QWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 61 ff 08 2e 71 7f\s+vucomxsd xmm30,QWORD PTR \[rcx\+0x3f8\] +\s*[a-f0-9]+:\s*62 61 ff 08 2e 72 80\s+vucomxsd xmm30,QWORD PTR \[rdx-0x400\] +\s*[a-f0-9]+:\s*62 05 7e 08 2e f5\s+vucomxsh xmm30,xmm29 +\s*[a-f0-9]+:\s*62 05 7e 18 2e f5\s+vucomxsh xmm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 25 7e 08 2e b4 f5 00 00 00 10\s+vucomxsh xmm30,WORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 45 7e 08 2e 31\s+vucomxsh xmm30,WORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 65 7e 08 2e 71 7f\s+vucomxsh xmm30,WORD PTR \[rcx\+0xfe\] +\s*[a-f0-9]+:\s*62 65 7e 08 2e 72 80\s+vucomxsh xmm30,WORD PTR \[rdx-0x100\] +\s*[a-f0-9]+:\s*62 01 7e 08 2e f5\s+vucomxss xmm30,xmm29 +\s*[a-f0-9]+:\s*62 01 7e 18 2e f5\s+vucomxss xmm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 21 7e 08 2e b4 f5 00 00 00 10\s+vucomxss xmm30,DWORD PTR \[rbp\+r14\*8\+0x10000000\] +\s*[a-f0-9]+:\s*62 41 7e 08 2e 31\s+vucomxss xmm30,DWORD PTR \[r9\] +\s*[a-f0-9]+:\s*62 61 7e 08 2e 71 7f\s+vucomxss xmm30,DWORD PTR \[rcx\+0x1fc\] +\s*[a-f0-9]+:\s*62 61 7e 08 2e 72 80\s+vucomxss xmm30,DWORD PTR \[rdx-0x200\] +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.d b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.d new file mode 100644 index 00000000000..0d339203ca5 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.d @@ -0,0 +1,107 @@ +#objdump: -dw +#name: x86_64 AVX10.2/256 minmax, vector copy and compare insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 03 17 00 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 03 17 20 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 23 17 27 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 17 30 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%r9\)\{1to16\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 63 17 20 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 63 17 b7 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%rdx\)\{1to16\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 23 17 07 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 17 10 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%r9\)\{1to8\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 17 00 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 17 97 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%rdx\)\{1to8\},%xmm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 95 00 52 f4 7b\s+vminmaxpd\s\$0x7b,%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 03 95 20 52 f4 7b\s+vminmaxpd\s\$0x7b,%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 23 95 27 52 b4 f5 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 95 30 52 31 7b\s+vminmaxpd\s\$0x7b,\(%r9\)\{1to4\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 63 95 20 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 63 95 b7 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%rdx\)\{1to4\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 23 95 07 52 b4 f5 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 95 10 52 31 7b\s+vminmaxpd\s\$0x7b,\(%r9\)\{1to2\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 95 00 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 95 97 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%rdx\)\{1to2\},%xmm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 14 00 52 f4 7b\s+vminmaxph\s\$0x7b,%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 03 14 20 52 f4 7b\s+vminmaxph\s\$0x7b,%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 23 14 27 52 b4 f5 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 14 30 52 31 7b\s+vminmaxph\s\$0x7b,\(%r9\)\{1to16\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 63 14 20 52 71 7f 7b\s+vminmaxph\s\$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 63 14 b7 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%rdx\)\{1to16\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 23 14 07 52 b4 f5 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 14 10 52 31 7b\s+vminmaxph\s\$0x7b,\(%r9\)\{1to8\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 14 00 52 71 7f 7b\s+vminmaxph\s\$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 14 97 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%rdx\)\{1to8\},%xmm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 15 00 52 f4 7b\s+vminmaxps\s\$0x7b,%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 03 15 20 52 f4 7b\s+vminmaxps\s\$0x7b,%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 23 15 27 52 b4 f5 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%rbp,%r14,8\),%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 15 30 52 31 7b\s+vminmaxps\s\$0x7b,\(%r9\)\{1to8\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 63 15 20 52 71 7f 7b\s+vminmaxps\s\$0x7b,0xfe0\(%rcx\),%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 63 15 b7 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%rdx\)\{1to8\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 23 15 07 52 b4 f5 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 15 10 52 31 7b\s+vminmaxps\s\$0x7b,\(%r9\)\{1to4\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 15 00 52 71 7f 7b\s+vminmaxps\s\$0x7b,0x7f0\(%rcx\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 15 97 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%rdx\)\{1to4\},%xmm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 95 00 53 f4 7b\s+vminmaxsd\s\$0x7b,%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 03 95 10 53 f4 7b\s+vminmaxsd\s\$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 23 95 07 53 b4 f5 00 00 00 10 7b\s+vminmaxsd\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 95 00 53 31 7b\s+vminmaxsd\s\$0x7b,\(%r9\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 95 00 53 71 7f 7b\s+vminmaxsd\s\$0x7b,0x3f8\(%rcx\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 95 87 53 72 80 7b\s+vminmaxsd\s\$0x7b,-0x400\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 14 00 53 f4 7b\s+vminmaxsh\s\$0x7b,%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 03 14 10 53 f4 7b\s+vminmaxsh\s\$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 23 14 07 53 b4 f5 00 00 00 10 7b\s+vminmaxsh\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 14 00 53 31 7b\s+vminmaxsh\s\$0x7b,\(%r9\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 14 00 53 71 7f 7b\s+vminmaxsh\s\$0x7b,0xfe\(%rcx\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 14 87 53 72 80 7b\s+vminmaxsh\s\$0x7b,-0x100\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 15 00 53 f4 7b\s+vminmaxss\s\$0x7b,%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 03 15 10 53 f4 7b\s+vminmaxss\s\$0x7b,\{sae\},%xmm28,%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 23 15 07 53 b4 f5 00 00 00 10 7b\s+vminmaxss\s\$0x7b,0x10000000\(%rbp,%r14,8\),%xmm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 15 00 53 31 7b\s+vminmaxss\s\$0x7b,\(%r9\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 15 00 53 71 7f 7b\s+vminmaxss\s\$0x7b,0x1fc\(%rcx\),%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 63 15 87 53 72 80 7b\s+vminmaxss\s\$0x7b,-0x200\(%rdx\),%xmm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 7e 08 7e f5\s+vmovd %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 7d 08 d6 ee\s+vmovd %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 7e 08 6e f5\s+vmovw %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 7e 08 7e ee\s+vmovw %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 ff 08 2f f5\s+vcomxsd %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 ff 18 2f f5\s+vcomxsd \{sae\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 21 ff 08 2f b4 f5 00 00 00 10\s+vcomxsd 0x10000000\(%rbp,%r14,8\),%xmm30 +\s*[a-f0-9]+:\s*62 41 ff 08 2f 31\s+vcomxsd \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 61 ff 08 2f 71 7f\s+vcomxsd 0x3f8\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 61 ff 08 2f 72 80\s+vcomxsd -0x400\(%rdx\),%xmm30 +\s*[a-f0-9]+:\s*62 05 7e 08 2f f5\s+vcomxsh %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 7e 18 2f f5\s+vcomxsh \{sae\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 25 7e 08 2f b4 f5 00 00 00 10\s+vcomxsh 0x10000000\(%rbp,%r14,8\),%xmm30 +\s*[a-f0-9]+:\s*62 45 7e 08 2f 31\s+vcomxsh \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 65 7e 08 2f 71 7f\s+vcomxsh 0xfe\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 65 7e 08 2f 72 80\s+vcomxsh -0x100\(%rdx\),%xmm30 +\s*[a-f0-9]+:\s*62 01 7e 08 2f f5\s+vcomxss %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 7e 18 2f f5\s+vcomxss \{sae\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 21 7e 08 2f b4 f5 00 00 00 10\s+vcomxss 0x10000000\(%rbp,%r14,8\),%xmm30 +\s*[a-f0-9]+:\s*62 41 7e 08 2f 31\s+vcomxss \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 61 7e 08 2f 71 7f\s+vcomxss 0x1fc\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 61 7e 08 2f 72 80\s+vcomxss -0x200\(%rdx\),%xmm30 +\s*[a-f0-9]+:\s*62 01 ff 08 2e f5\s+vucomxsd %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 ff 18 2e f5\s+vucomxsd \{sae\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 21 ff 08 2e b4 f5 00 00 00 10\s+vucomxsd 0x10000000\(%rbp,%r14,8\),%xmm30 +\s*[a-f0-9]+:\s*62 41 ff 08 2e 31\s+vucomxsd \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 61 ff 08 2e 71 7f\s+vucomxsd 0x3f8\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 61 ff 08 2e 72 80\s+vucomxsd -0x400\(%rdx\),%xmm30 +\s*[a-f0-9]+:\s*62 05 7e 08 2e f5\s+vucomxsh %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 7e 18 2e f5\s+vucomxsh \{sae\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 25 7e 08 2e b4 f5 00 00 00 10\s+vucomxsh 0x10000000\(%rbp,%r14,8\),%xmm30 +\s*[a-f0-9]+:\s*62 45 7e 08 2e 31\s+vucomxsh \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 65 7e 08 2e 71 7f\s+vucomxsh 0xfe\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 65 7e 08 2e 72 80\s+vucomxsh -0x100\(%rdx\),%xmm30 +\s*[a-f0-9]+:\s*62 01 7e 08 2e f5\s+vucomxss %xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 7e 18 2e f5\s+vucomxss \{sae\},%xmm29,%xmm30 +\s*[a-f0-9]+:\s*62 21 7e 08 2e b4 f5 00 00 00 10\s+vucomxss 0x10000000\(%rbp,%r14,8\),%xmm30 +\s*[a-f0-9]+:\s*62 41 7e 08 2e 31\s+vucomxss \(%r9\),%xmm30 +\s*[a-f0-9]+:\s*62 61 7e 08 2e 71 7f\s+vucomxss 0x1fc\(%rcx\),%xmm30 +\s*[a-f0-9]+:\s*62 61 7e 08 2e 72 80\s+vucomxss -0x200\(%rdx\),%xmm30 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.s b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.s new file mode 100644 index 00000000000..58251718482 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-256-miscs.s @@ -0,0 +1,205 @@ +# Check 64bit AVX10.2/256 instructions + + .arch generic64 + .arch .avx10.2/256 + .text +_start: + vminmaxpbf16 $123, %xmm28, %xmm29, %xmm30 + vminmaxpbf16 $123, %ymm28, %ymm29, %ymm30 + vminmaxpbf16 $123, 0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7} + vminmaxpbf16 $123, (%r9){1to16}, %ymm29, %ymm30 + vminmaxpbf16 $123, 4064(%rcx), %ymm29, %ymm30 + vminmaxpbf16 $123, -256(%rdx){1to16}, %ymm29, %ymm30{%k7}{z} + vminmaxpbf16 $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7} + vminmaxpbf16 $123, (%r9){1to8}, %xmm29, %xmm30 + vminmaxpbf16 $123, 2032(%rcx), %xmm29, %xmm30 + vminmaxpbf16 $123, -256(%rdx){1to8}, %xmm29, %xmm30{%k7}{z} + vminmaxpd $123, %xmm28, %xmm29, %xmm30 + vminmaxpd $123, %ymm28, %ymm29, %ymm30 + vminmaxpd $123, 0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7} + vminmaxpd $123, (%r9){1to4}, %ymm29, %ymm30 + vminmaxpd $123, 4064(%rcx), %ymm29, %ymm30 + vminmaxpd $123, -1024(%rdx){1to4}, %ymm29, %ymm30{%k7}{z} + vminmaxpd $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7} + vminmaxpd $123, (%r9){1to2}, %xmm29, %xmm30 + vminmaxpd $123, 2032(%rcx), %xmm29, %xmm30 + vminmaxpd $123, -1024(%rdx){1to2}, %xmm29, %xmm30{%k7}{z} + vminmaxph $123, %xmm28, %xmm29, %xmm30 + vminmaxph $123, %ymm28, %ymm29, %ymm30 + vminmaxph $123, 0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7} + vminmaxph $123, (%r9){1to16}, %ymm29, %ymm30 + vminmaxph $123, 4064(%rcx), %ymm29, %ymm30 + vminmaxph $123, -256(%rdx){1to16}, %ymm29, %ymm30{%k7}{z} + vminmaxph $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7} + vminmaxph $123, (%r9){1to8}, %xmm29, %xmm30 + vminmaxph $123, 2032(%rcx), %xmm29, %xmm30 + vminmaxph $123, -256(%rdx){1to8}, %xmm29, %xmm30{%k7}{z} + vminmaxps $123, %xmm28, %xmm29, %xmm30 + vminmaxps $123, %ymm28, %ymm29, %ymm30 + vminmaxps $123, 0x10000000(%rbp, %r14, 8), %ymm29, %ymm30{%k7} + vminmaxps $123, (%r9){1to8}, %ymm29, %ymm30 + vminmaxps $123, 4064(%rcx), %ymm29, %ymm30 + vminmaxps $123, -512(%rdx){1to8}, %ymm29, %ymm30{%k7}{z} + vminmaxps $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7} + vminmaxps $123, (%r9){1to4}, %xmm29, %xmm30 + vminmaxps $123, 2032(%rcx), %xmm29, %xmm30 + vminmaxps $123, -512(%rdx){1to4}, %xmm29, %xmm30{%k7}{z} + vminmaxsd $123, %xmm28, %xmm29, %xmm30 + vminmaxsd $123, {sae}, %xmm28, %xmm29, %xmm30 + vminmaxsd $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7} + vminmaxsd $123, (%r9), %xmm29, %xmm30 + vminmaxsd $123, 1016(%rcx), %xmm29, %xmm30 + vminmaxsd $123, -1024(%rdx), %xmm29, %xmm30{%k7}{z} + vminmaxsh $123, %xmm28, %xmm29, %xmm30 + vminmaxsh $123, {sae}, %xmm28, %xmm29, %xmm30 + vminmaxsh $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7} + vminmaxsh $123, (%r9), %xmm29, %xmm30 + vminmaxsh $123, 254(%rcx), %xmm29, %xmm30 + vminmaxsh $123, -256(%rdx), %xmm29, %xmm30{%k7}{z} + vminmaxss $123, %xmm28, %xmm29, %xmm30 + vminmaxss $123, {sae}, %xmm28, %xmm29, %xmm30 + vminmaxss $123, 0x10000000(%rbp, %r14, 8), %xmm29, %xmm30{%k7} + vminmaxss $123, (%r9), %xmm29, %xmm30 + vminmaxss $123, 508(%rcx), %xmm29, %xmm30 + vminmaxss $123, -512(%rdx), %xmm29, %xmm30{%k7}{z} + vmovd %xmm29, %xmm30 + vmovd.s %xmm29, %xmm30 + vmovw %xmm29, %xmm30 + vmovw.s %xmm29, %xmm30 + vcomxsd %xmm29, %xmm30 + vcomxsd {sae}, %xmm29, %xmm30 + vcomxsd 0x10000000(%rbp, %r14, 8), %xmm30 + vcomxsd (%r9), %xmm30 + vcomxsd 1016(%rcx), %xmm30 + vcomxsd -1024(%rdx), %xmm30 + vcomxsh %xmm29, %xmm30 + vcomxsh {sae}, %xmm29, %xmm30 + vcomxsh 0x10000000(%rbp, %r14, 8), %xmm30 + vcomxsh (%r9), %xmm30 + vcomxsh 254(%rcx), %xmm30 + vcomxsh -256(%rdx), %xmm30 + vcomxss %xmm29, %xmm30 + vcomxss {sae}, %xmm29, %xmm30 + vcomxss 0x10000000(%rbp, %r14, 8), %xmm30 + vcomxss (%r9), %xmm30 + vcomxss 508(%rcx), %xmm30 + vcomxss -512(%rdx), %xmm30 + vucomxsd %xmm29, %xmm30 + vucomxsd {sae}, %xmm29, %xmm30 + vucomxsd 0x10000000(%rbp, %r14, 8), %xmm30 + vucomxsd (%r9), %xmm30 + vucomxsd 1016(%rcx), %xmm30 + vucomxsd -1024(%rdx), %xmm30 + vucomxsh %xmm29, %xmm30 + vucomxsh {sae}, %xmm29, %xmm30 + vucomxsh 0x10000000(%rbp, %r14, 8), %xmm30 + vucomxsh (%r9), %xmm30 + vucomxsh 254(%rcx), %xmm30 + vucomxsh -256(%rdx), %xmm30 + vucomxss %xmm29, %xmm30 + vucomxss {sae}, %xmm29, %xmm30 + vucomxss 0x10000000(%rbp, %r14, 8), %xmm30 + vucomxss (%r9), %xmm30 + vucomxss 508(%rcx), %xmm30 + vucomxss -512(%rdx), %xmm30 + +_intel: + .intel_syntax noprefix + vminmaxpbf16 xmm30, xmm29, xmm28, 123 + vminmaxpbf16 ymm30, ymm29, ymm28, 123 + vminmaxpbf16 ymm30{k7}, ymm29, [rbp+r14*8+0x10000000], 123 + vminmaxpbf16 ymm30, ymm29, [r9]{1to16}, 123 + vminmaxpbf16 ymm30, ymm29, YMMWORD PTR [rcx+4064], 123 + vminmaxpbf16 ymm30{k7}{z}, ymm29, WORD PTR [rdx-256]{1to16}, 123 + vminmaxpbf16 xmm30{k7}, xmm29, [rbp+r14*8+0x10000000], 123 + vminmaxpbf16 xmm30, xmm29, [r9]{1to8}, 123 + vminmaxpbf16 xmm30, xmm29, XMMWORD PTR [rcx+2032], 123 + vminmaxpbf16 xmm30{k7}{z}, xmm29, WORD PTR [rdx-256]{1to8}, 123 + vminmaxpd xmm30, xmm29, xmm28, 123 + vminmaxpd ymm30, ymm29, ymm28, 123 + vminmaxpd ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000], 123 + vminmaxpd ymm30, ymm29, QWORD PTR [r9]{1to4}, 123 + vminmaxpd ymm30, ymm29, [rcx+4064], 123 + vminmaxpd ymm30{k7}{z}, ymm29, [rdx-1024]{1to4}, 123 + vminmaxpd xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000], 123 + vminmaxpd xmm30, xmm29, QWORD PTR [r9]{1to2}, 123 + vminmaxpd xmm30, xmm29, [rcx+2032], 123 + vminmaxpd xmm30{k7}{z}, xmm29, [rdx-1024]{1to2}, 123 + vminmaxph xmm30, xmm29, xmm28, 123 + vminmaxph ymm30, ymm29, ymm28, 123 + vminmaxph ymm30{k7}, ymm29, [rbp+r14*8+0x10000000], 123 + vminmaxph ymm30, ymm29, [r9]{1to16}, 123 + vminmaxph ymm30, ymm29, YMMWORD PTR [rcx+4064], 123 + vminmaxph ymm30{k7}{z}, ymm29, WORD PTR [rdx-256]{1to16}, 123 + vminmaxph xmm30{k7}, xmm29, XMMWORD PTR [rbp+r14*8+0x10000000], 123 + vminmaxph xmm30, xmm29, WORD PTR [r9]{1to8}, 123 + vminmaxph xmm30, xmm29, [rcx+2032], 123 + vminmaxph xmm30{k7}{z}, xmm29, [rdx-256]{1to8}, 123 + vminmaxps xmm30, xmm29, xmm28, 123 + vminmaxps ymm30, ymm29, ymm28, 123 + vminmaxps ymm30{k7}, ymm29, YMMWORD PTR [rbp+r14*8+0x10000000], 123 + vminmaxps ymm30, ymm29, DWORD PTR [r9]{1to8}, 123 + vminmaxps ymm30, ymm29, [rcx+4064], 123 + vminmaxps ymm30{k7}{z}, ymm29, [rdx-512]{1to8}, 123 + vminmaxps xmm30{k7}, xmm29, [rbp+r14*8+0x10000000], 123 + vminmaxps xmm30, xmm29, [r9]{1to4}, 123 + vminmaxps xmm30, xmm29, XMMWORD PTR [rcx+2032], 123 + vminmaxps xmm30{k7}{z}, xmm29, DWORD PTR [rdx-512]{1to4}, 123 + vminmaxsd xmm30, xmm29, xmm28, 123 + vminmaxsd xmm30, xmm29, xmm28, {sae}, 123 + vminmaxsd xmm30{k7}, xmm29, [rbp+r14*8+0x10000000], 123 + vminmaxsd xmm30, xmm29, [r9], 123 + vminmaxsd xmm30, xmm29, QWORD PTR [rcx+1016], 123 + vminmaxsd xmm30{k7}{z}, xmm29, QWORD PTR [rdx-1024], 123 + vminmaxsh xmm30, xmm29, xmm28, 123 + vminmaxsh xmm30, xmm29, xmm28, {sae}, 123 + vminmaxsh xmm30{k7}, xmm29, WORD PTR [rbp+r14*8+0x10000000], 123 + vminmaxsh xmm30, xmm29, WORD PTR [r9], 123 + vminmaxsh xmm30, xmm29, [rcx+254], 123 + vminmaxsh xmm30{k7}{z}, xmm29, [rdx-256], 123 + vminmaxss xmm30, xmm29, xmm28, 123 + vminmaxss xmm30, xmm29, xmm28, {sae}, 123 + vminmaxss xmm30{k7}, xmm29, [rbp+r14*8+0x10000000], 123 + vminmaxss xmm30, xmm29, DWORD PTR [r9], 123 + vminmaxss xmm30, xmm29, DWORD PTR [rcx+508], 123 + vminmaxss xmm30{k7}{z}, xmm29, [rdx-512], 123 + vmovd xmm30, xmm29 + vmovd.s xmm30, xmm29 + vmovw xmm30, xmm29 + vmovw.s xmm30, xmm29 + vcomxsd xmm30, xmm29 + vcomxsd xmm30, xmm29, {sae} + vcomxsd xmm30, QWORD PTR [rbp+r14*8+0x10000000] + vcomxsd xmm30, [r9] + vcomxsd xmm30, QWORD PTR [rcx+1016] + vcomxsd xmm30, [rdx-1024] + vcomxsh xmm30, xmm29 + vcomxsh xmm30, xmm29, {sae} + vcomxsh xmm30, [rbp+r14*8+0x10000000] + vcomxsh xmm30, WORD PTR [r9] + vcomxsh xmm30, [rcx+254] + vcomxsh xmm30, WORD PTR [rdx-256] + vcomxss xmm30, xmm29 + vcomxss xmm30, xmm29, {sae} + vcomxss xmm30, DWORD PTR [rbp+r14*8+0x10000000] + vcomxss xmm30, [r9] + vcomxss xmm30, [rcx+508] + vcomxss xmm30, DWORD PTR [rdx-512] + vucomxsd xmm30, xmm29 + vucomxsd xmm30, xmm29, {sae} + vucomxsd xmm30, [rbp+r14*8+0x10000000] + vucomxsd xmm30, [r9] + vucomxsd xmm30, QWORD PTR [rcx+1016] + vucomxsd xmm30, QWORD PTR [rdx-1024] + vucomxsh xmm30, xmm29 + vucomxsh xmm30, xmm29, {sae} + vucomxsh xmm30, WORD PTR [rbp+r14*8+0x10000000] + vucomxsh xmm30, WORD PTR [r9] + vucomxsh xmm30, [rcx+254] + vucomxsh xmm30, [rdx-256] + vucomxss xmm30, xmm29 + vucomxss xmm30, xmm29, {sae} + vucomxss xmm30, [rbp+r14*8+0x10000000] + vucomxss xmm30, DWORD PTR [r9] + vucomxss xmm30, DWORD PTR [rcx+508] + vucomxss xmm30, [rdx-512] diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d new file mode 100644 index 00000000000..3115884c882 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d @@ -0,0 +1,34 @@ +#objdump: -dw -Mintel +#name: x86_64 AVX10.2/512 minmax insns (Intel disassembly) +#source: x86-64-avx10_2-512-miscs.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +\s*[a-f0-9]+:\s*62 03 17 40 52 f4 7b\s+vminmaxpbf16 zmm30,zmm29,zmm28,0x7b +\s*[a-f0-9]+:\s*62 23 17 47 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16 zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 17 50 52 31 7b\s+vminmaxpbf16 zmm30,zmm29,WORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 17 40 52 71 7f 7b\s+vminmaxpbf16 zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b +\s*[a-f0-9]+:\s*62 63 17 d7 52 72 80 7b\s+vminmaxpbf16 zmm30\{k7\}\{z\},zmm29,WORD BCST \[rdx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 03 95 40 52 f4 7b\s+vminmaxpd zmm30,zmm29,zmm28,0x7b +\s*[a-f0-9]+:\s*62 03 95 10 52 f4 7b\s+vminmaxpd zmm30,zmm29,zmm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 23 95 47 52 b4 f5 00 00 00 10 7b\s+vminmaxpd zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 95 50 52 31 7b\s+vminmaxpd zmm30,zmm29,QWORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 95 40 52 71 7f 7b\s+vminmaxpd zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b +\s*[a-f0-9]+:\s*62 63 95 d7 52 72 80 7b\s+vminmaxpd zmm30\{k7\}\{z\},zmm29,QWORD BCST \[rdx-0x400\],0x7b +\s*[a-f0-9]+:\s*62 03 14 40 52 f4 7b\s+vminmaxph zmm30,zmm29,zmm28,0x7b +\s*[a-f0-9]+:\s*62 03 14 10 52 f4 7b\s+vminmaxph zmm30,zmm29,zmm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 23 14 47 52 b4 f5 00 00 00 10 7b\s+vminmaxph zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 14 50 52 31 7b\s+vminmaxph zmm30,zmm29,WORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 14 40 52 71 7f 7b\s+vminmaxph zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b +\s*[a-f0-9]+:\s*62 63 14 d7 52 72 80 7b\s+vminmaxph zmm30\{k7\}\{z\},zmm29,WORD BCST \[rdx-0x100\],0x7b +\s*[a-f0-9]+:\s*62 03 15 40 52 f4 7b\s+vminmaxps zmm30,zmm29,zmm28,0x7b +\s*[a-f0-9]+:\s*62 03 15 10 52 f4 7b\s+vminmaxps zmm30,zmm29,zmm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 23 15 47 52 b4 f5 00 00 00 10 7b\s+vminmaxps zmm30\{k7\},zmm29,ZMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b +\s*[a-f0-9]+:\s*62 43 15 50 52 31 7b\s+vminmaxps zmm30,zmm29,DWORD BCST \[r9\],0x7b +\s*[a-f0-9]+:\s*62 63 15 40 52 71 7f 7b\s+vminmaxps zmm30,zmm29,ZMMWORD PTR \[rcx\+0x1fc0\],0x7b +\s*[a-f0-9]+:\s*62 63 15 d7 52 72 80 7b\s+vminmaxps zmm30\{k7\}\{z\},zmm29,DWORD BCST \[rdx-0x200\],0x7b +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.d b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.d new file mode 100644 index 00000000000..101607ff685 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.d @@ -0,0 +1,32 @@ +#objdump: -dw +#name: x86_64 AVX10.2/512 minmax insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 03 17 40 52 f4 7b\s+vminmaxpbf16\s\$0x7b,%zmm28,%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 23 17 47 52 b4 f5 00 00 00 10 7b\s+vminmaxpbf16\s\$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 17 50 52 31 7b\s+vminmaxpbf16\s\$0x7b,\(%r9\)\{1to32\},%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 63 17 40 52 71 7f 7b\s+vminmaxpbf16\s\$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 63 17 d7 52 72 80 7b\s+vminmaxpbf16\s\$0x7b,-0x100\(%rdx\)\{1to32\},%zmm29,%zmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 95 40 52 f4 7b\s+vminmaxpd\s\$0x7b,%zmm28,%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 03 95 10 52 f4 7b\s+vminmaxpd\s\$0x7b,\{sae\},%zmm28,%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 23 95 47 52 b4 f5 00 00 00 10 7b\s+vminmaxpd\s\$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 95 50 52 31 7b\s+vminmaxpd\s\$0x7b,\(%r9\)\{1to8\},%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 63 95 40 52 71 7f 7b\s+vminmaxpd\s\$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 63 95 d7 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%rdx\)\{1to8\},%zmm29,%zmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 14 40 52 f4 7b\s+vminmaxph\s\$0x7b,%zmm28,%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 03 14 10 52 f4 7b\s+vminmaxph\s\$0x7b,\{sae\},%zmm28,%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 23 14 47 52 b4 f5 00 00 00 10 7b\s+vminmaxph\s\$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 14 50 52 31 7b\s+vminmaxph\s\$0x7b,\(%r9\)\{1to32\},%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 63 14 40 52 71 7f 7b\s+vminmaxph\s\$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 63 14 d7 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%rdx\)\{1to32\},%zmm29,%zmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 15 40 52 f4 7b\s+vminmaxps\s\$0x7b,%zmm28,%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 03 15 10 52 f4 7b\s+vminmaxps\s\$0x7b,\{sae\},%zmm28,%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 23 15 47 52 b4 f5 00 00 00 10 7b\s+vminmaxps\s\$0x7b,0x10000000\(%rbp,%r14,8\),%zmm29,%zmm30\{%k7\} +\s*[a-f0-9]+:\s*62 43 15 50 52 31 7b\s+vminmaxps\s\$0x7b,\(%r9\)\{1to16\},%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 63 15 40 52 71 7f 7b\s+vminmaxps\s\$0x7b,0x1fc0\(%rcx\),%zmm29,%zmm30 +\s*[a-f0-9]+:\s*62 63 15 d7 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%rdx\)\{1to16\},%zmm29,%zmm30\{%k7\}\{z\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.s b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.s new file mode 100644 index 00000000000..62c741e3025 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-512-miscs.s @@ -0,0 +1,55 @@ +# Check 64bit AVX10.2/512 instructions + + .arch generic64 + .arch .avx10.2/512 + .text +_start: + vminmaxpbf16 $123, %zmm28, %zmm29, %zmm30 + vminmaxpbf16 $123, 0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7} + vminmaxpbf16 $123, (%r9){1to32}, %zmm29, %zmm30 + vminmaxpbf16 $123, 8128(%rcx), %zmm29, %zmm30 + vminmaxpbf16 $123, -256(%rdx){1to32}, %zmm29, %zmm30{%k7}{z} + vminmaxpd $123, %zmm28, %zmm29, %zmm30 + vminmaxpd $123, {sae}, %zmm28, %zmm29, %zmm30 + vminmaxpd $123, 0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7} + vminmaxpd $123, (%r9){1to8}, %zmm29, %zmm30 + vminmaxpd $123, 8128(%rcx), %zmm29, %zmm30 + vminmaxpd $123, -1024(%rdx){1to8}, %zmm29, %zmm30{%k7}{z} + vminmaxph $123, %zmm28, %zmm29, %zmm30 + vminmaxph $123, {sae}, %zmm28, %zmm29, %zmm30 + vminmaxph $123, 0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7} + vminmaxph $123, (%r9){1to32}, %zmm29, %zmm30 + vminmaxph $123, 8128(%rcx), %zmm29, %zmm30 + vminmaxph $123, -256(%rdx){1to32}, %zmm29, %zmm30{%k7}{z} + vminmaxps $123, %zmm28, %zmm29, %zmm30 + vminmaxps $123, {sae}, %zmm28, %zmm29, %zmm30 + vminmaxps $123, 0x10000000(%rbp, %r14, 8), %zmm29, %zmm30{%k7} + vminmaxps $123, (%r9){1to16}, %zmm29, %zmm30 + vminmaxps $123, 8128(%rcx), %zmm29, %zmm30 + vminmaxps $123, -512(%rdx){1to16}, %zmm29, %zmm30{%k7}{z} + +_intel: + .intel_syntax noprefix + vminmaxpbf16 zmm30, zmm29, zmm28, 123 + vminmaxpbf16 zmm30{k7}, zmm29, [rbp+r14*8+0x10000000], 123 + vminmaxpbf16 zmm30, zmm29, [r9]{1to32}, 123 + vminmaxpbf16 zmm30, zmm29, ZMMWORD PTR [rcx+8128], 123 + vminmaxpbf16 zmm30{k7}{z}, zmm29, WORD PTR [rdx-256]{1to32}, 123 + vminmaxpd zmm30, zmm29, zmm28, 123 + vminmaxpd zmm30, zmm29, zmm28, {sae}, 123 + vminmaxpd zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000], 123 + vminmaxpd zmm30, zmm29, QWORD PTR [r9]{1to8}, 123 + vminmaxpd zmm30, zmm29, [rcx+8128], 123 + vminmaxpd zmm30{k7}{z}, zmm29, [rdx-1024]{1to8}, 123 + vminmaxph zmm30, zmm29, zmm28, 123 + vminmaxph zmm30, zmm29, zmm28, {sae}, 123 + vminmaxph zmm30{k7}, zmm29, [rbp+r14*8+0x10000000], 123 + vminmaxph zmm30, zmm29, WORD PTR [r9]{1to32}, 123 + vminmaxph zmm30, zmm29, ZMMWORD PTR [rcx+8128], 123 + vminmaxph zmm30{k7}{z}, zmm29, [rdx-256]{1to32}, 123 + vminmaxps zmm30, zmm29, zmm28, 123 + vminmaxps zmm30, zmm29, zmm28, {sae}, 123 + vminmaxps zmm30{k7}, zmm29, ZMMWORD PTR [rbp+r14*8+0x10000000], 123 + vminmaxps zmm30, zmm29, [r9]{1to16}, 123 + vminmaxps zmm30, zmm29, [rcx+8128], 123 + vminmaxps zmm30{k7}{z}, zmm29, DWORD PTR [rdx-512]{1to16}, 123 diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 7b5f8bd28c3..7dfe608ff7e 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -513,6 +513,10 @@ run_dump_test "x86-64-avx10_2-512-satcvt" run_dump_test "x86-64-avx10_2-512-satcvt-intel" run_dump_test "x86-64-avx10_2-256-satcvt" run_dump_test "x86-64-avx10_2-256-satcvt-intel" +run_dump_test "x86-64-avx10_2-512-miscs" +run_dump_test "x86-64-avx10_2-512-miscs-intel" +run_dump_test "x86-64-avx10_2-256-miscs" +run_dump_test "x86-64-avx10_2-256-miscs-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/opcodes/i386-dis-evex-len.h b/opcodes/i386-dis-evex-len.h index a02609c50f2..24cc7b2e027 100644 --- a/opcodes/i386-dis-evex-len.h +++ b/opcodes/i386-dis-evex-len.h @@ -1,4 +1,14 @@ static const struct dis386 evex_len_table[][3] = { + /* EVEX_LEN_0F7E_P_1_W_1 */ + { + { "vmovd", { XMScalar, EXd }, 0 }, + }, + + /* EVEX_LEN_0FD6_P_2_W_0 */ + { + { "vmovd", { EXdS, XMScalar }, 0 }, + }, + /* EVEX_LEN_0F3816 */ { { Bad_Opcode }, @@ -145,4 +155,14 @@ static const struct dis386 evex_len_table[][3] = { { VEX_W_TABLE (EVEX_W_0F3A43_L_n) }, { VEX_W_TABLE (EVEX_W_0F3A43_L_n) }, }, + + /* EVEX_LEN_MAP5_6E */ + { + { PREFIX_TABLE (PREFIX_EVEX_MAP5_6E_L_0) }, + }, + + /* EVEX_LEN_MAP5_7E */ + { + { PREFIX_TABLE (PREFIX_EVEX_MAP5_7E_L_0) }, + }, }; diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h index 171600190a6..16fb2698390 100644 --- a/opcodes/i386-dis-evex-prefix.h +++ b/opcodes/i386-dis-evex-prefix.h @@ -1,3 +1,17 @@ + /* PREFIX_EVEX_0F2E */ + { + { "%XEvucomis%XS", { XMScalar, EXd, EXxEVexS }, 0 }, + { "vucomxs%XS", { XMScalar, EXd, EXxEVexS }, 0 }, + { "%XEvucomis%XD", { XMScalar, EXq, EXxEVexS }, 0 }, + { "vucomxs%XD", { XMScalar, EXq, EXxEVexS }, 0 }, + }, + /* PREFIX_EVEX_0F2F */ + { + { "%XEvcomis%XS", { XMScalar, EXd, EXxEVexS }, 0 }, + { "vcomxs%XS", { XMScalar, EXd, EXxEVexS }, 0 }, + { "%XEvcomis%XD", { XMScalar, EXq, EXxEVexS }, 0 }, + { "vcomxs%XD", { XMScalar, EXq, EXxEVexS }, 0 }, + }, /* PREFIX_EVEX_0F5B */ { { VEX_W_TABLE (EVEX_W_0F5B_P_0) }, @@ -324,6 +338,19 @@ { "%XEvmpsadbw", { XM, Vex, EXx, Ib }, 0 }, { "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 }, }, + /* PREFIX_EVEX_0F3A52 */ + { + { "vminmaxp%XH", { XM, Vex, EXxh, EXxEVexS, Ib }, 0 }, + { Bad_Opcode }, + { "vminmaxp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, 0 }, + { "vminmaxp%XB", { XM, Vex, EXxh, Ib }, 0 }, + }, + /* PREFIX_EVEX_0F3A53 */ + { + { "vminmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 }, + { Bad_Opcode }, + { "vminmaxs%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 }, + }, /* PREFIX_EVEX_0F3A56 */ { { "vreducep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 }, @@ -441,12 +468,13 @@ }, /* PREFIX_EVEX_MAP5_2E */ { - { "vucomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 }, + { "vucomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 }, + { "vucomxs%XH", { XMScalar, EXw, EXxEVexS }, 0 }, }, /* PREFIX_EVEX_MAP5_2F */ { - { "vcomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 }, - { Bad_Opcode }, + { "vcomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 }, + { "vcomxs%XH", { XMScalar, EXw, EXxEVexS }, 0 }, { "vcoms%XB", { XMScalar, EXw, EXxEVexS }, 0 }, }, /* PREFIX_EVEX_MAP5_51 */ @@ -546,6 +574,12 @@ { VEX_W_TABLE (EVEX_W_MAP5_6D_P_2) }, { "vcvttsd2sis", { Gdq, EXq, EXxEVexS }, 0 }, }, + /* PREFIX_EVEX_MAP5_6E_L_0 */ + { + { Bad_Opcode }, + { VEX_W_TABLE (EVEX_W_MAP5_6E_P_1) }, + { "vmovwY", { XMScalar, Edw }, 0 }, + }, /* PREFIX_EVEX_MAP5_74 */ { { "vcvtbiasp%XH2bf8s", { XMxmmq, Vex, EXxh }, 0 }, @@ -591,6 +625,12 @@ { "vcvtp%XH2w", { XM, EXxh, EXxEVexR }, 0 }, { "vcvtuw2p%XH", { XM, EXxh, EXxEVexR }, 0 }, }, + /* PREFIX_EVEX_MAP5_7E_L_0 */ + { + { Bad_Opcode }, + { VEX_W_TABLE (EVEX_W_MAP5_7E_P_1) }, + { "vmovw", { Edw, XMScalar }, 0 }, + }, /* PREFIX_EVEX_MAP6_13 */ { { "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 }, diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h index 7a10d5f4c9d..67d72220840 100644 --- a/opcodes/i386-dis-evex-w.h +++ b/opcodes/i386-dis-evex-w.h @@ -112,7 +112,7 @@ }, /* EVEX_W_0F7E_P_1 */ { - { Bad_Opcode }, + { EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_1_W_1) }, { VEX_LEN_TABLE (VEX_LEN_0F7E_P_1) }, }, /* EVEX_W_0F7F_P_1 */ @@ -146,7 +146,7 @@ }, /* EVEX_W_0FD6 */ { - { Bad_Opcode }, + { EVEX_LEN_TABLE (EVEX_LEN_0FD6_P_2_W_0) }, { VEX_LEN_TABLE (VEX_LEN_0FD6) }, }, /* EVEX_W_0FE6_P_1 */ @@ -485,8 +485,16 @@ { "vcvttps2qqs", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 }, { "vcvttpd2qqs", { XM, EXx, EXxEVexS }, 0 }, }, + /* EVEX_W_MAP5_6E_P_1 */ + { + { "vmovw", { XMScalar, EXw }, 0 }, + }, /* EVEX_W_MAP5_7A_P_3 */ { { "vcvtudq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, { "vcvtuqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 }, }, + /* EVEX_W_MAP5_7E_P_1 */ + { + { "vmovw", { EXwS, XMScalar }, 0 }, + }, diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index ab0471a06e9..13b8a3244ae 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -53,8 +53,8 @@ static const struct dis386 evex_table[][256] = { { "%XEvmovntpX", { Mx, XM }, PREFIX_OPCODE }, { PREFIX_TABLE (PREFIX_VEX_0F2C) }, { PREFIX_TABLE (PREFIX_VEX_0F2D) }, - { PREFIX_TABLE (PREFIX_0F2E) }, - { PREFIX_TABLE (PREFIX_0F2F) }, + { PREFIX_TABLE (PREFIX_EVEX_0F2E) }, + { PREFIX_TABLE (PREFIX_EVEX_0F2F) }, /* 30 */ { Bad_Opcode }, { Bad_Opcode }, @@ -676,8 +676,8 @@ static const struct dis386 evex_table[][256] = { /* 50 */ { "vrangep%XW", { XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA }, { "vranges%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_EVEX_0F3A52) }, + { PREFIX_TABLE (PREFIX_EVEX_0F3A53) }, { "vfixupimmp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, PREFIX_DATA }, { "vfixupimms%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, PREFIX_DATA }, { PREFIX_TABLE (PREFIX_EVEX_0F3A56) }, @@ -1289,7 +1289,7 @@ static const struct dis386 evex_table[][256] = { { PREFIX_TABLE (PREFIX_EVEX_MAP5_6B) }, { PREFIX_TABLE (PREFIX_EVEX_MAP5_6C) }, { PREFIX_TABLE (PREFIX_EVEX_MAP5_6D) }, - { "vmovwY", { XMScalar, Edw }, PREFIX_DATA }, + { EVEX_LEN_TABLE (EVEX_LEN_MAP5_6E) }, { Bad_Opcode }, /* 70 */ { Bad_Opcode }, @@ -1307,7 +1307,7 @@ static const struct dis386 evex_table[][256] = { { PREFIX_TABLE (PREFIX_EVEX_MAP5_7B) }, { PREFIX_TABLE (PREFIX_EVEX_MAP5_7C) }, { PREFIX_TABLE (PREFIX_EVEX_MAP5_7D) }, - { "vmovw", { Edw, XMScalar }, PREFIX_DATA }, + { EVEX_LEN_TABLE (EVEX_LEN_MAP5_7E) }, { Bad_Opcode }, /* 80 */ { Bad_Opcode }, diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 63de116c917..8fe8e7d726e 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1155,6 +1155,8 @@ enum PREFIX_VEX_MAP7_F6_L_0_W_0_R_0_X86_64, PREFIX_VEX_MAP7_F8_L_0_W_0_R_0_X86_64, + PREFIX_EVEX_0F2E, + PREFIX_EVEX_0F2F, PREFIX_EVEX_0F5B, PREFIX_EVEX_0F6F, PREFIX_EVEX_0F70, @@ -1207,6 +1209,8 @@ enum PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27, PREFIX_EVEX_0F3A42_W_0, + PREFIX_EVEX_0F3A52, + PREFIX_EVEX_0F3A53, PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66, @@ -1245,6 +1249,7 @@ enum PREFIX_EVEX_MAP5_6B, PREFIX_EVEX_MAP5_6C, PREFIX_EVEX_MAP5_6D, + PREFIX_EVEX_MAP5_6E_L_0, PREFIX_EVEX_MAP5_74, PREFIX_EVEX_MAP5_78, PREFIX_EVEX_MAP5_79, @@ -1252,6 +1257,7 @@ enum PREFIX_EVEX_MAP5_7B, PREFIX_EVEX_MAP5_7C, PREFIX_EVEX_MAP5_7D, + PREFIX_EVEX_MAP5_7E_L_0, PREFIX_EVEX_MAP6_13, PREFIX_EVEX_MAP6_2C, @@ -1521,7 +1527,9 @@ enum enum { - EVEX_LEN_0F3816 = 0, + EVEX_LEN_0F7E_P_1_W_1 = 0, + EVEX_LEN_0FD6_P_2_W_0, + EVEX_LEN_0F3816, EVEX_LEN_0F3819, EVEX_LEN_0F381A, EVEX_LEN_0F381B, @@ -1541,7 +1549,10 @@ enum EVEX_LEN_0F3A39, EVEX_LEN_0F3A3A, EVEX_LEN_0F3A3B, - EVEX_LEN_0F3A43 + EVEX_LEN_0F3A43, + + EVEX_LEN_MAP5_6E, + EVEX_LEN_MAP5_7E, }; enum @@ -1777,7 +1788,9 @@ enum EVEX_W_MAP5_6C_P_2, EVEX_W_MAP5_6D_P_0, EVEX_W_MAP5_6D_P_2, + EVEX_W_MAP5_6E_P_1, EVEX_W_MAP5_7A_P_3, + EVEX_W_MAP5_7E_P_1, }; typedef bool (*op_rtn) (instr_info *ins, int bytemode, int sizeflag); @@ -3311,16 +3324,16 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_0F2E */ { - { "%XEVucomisYX", { XMScalar, EXd, EXxEVexS }, 0 }, + { "VucomisYX", { XMScalar, EXd, EXxEVexS }, 0 }, { Bad_Opcode }, - { "%XEVucomisYX", { XMScalar, EXq, EXxEVexS }, 0 }, + { "VucomisYX", { XMScalar, EXq, EXxEVexS }, 0 }, }, /* PREFIX_0F2F */ { - { "%XEVcomisYX", { XMScalar, EXd, EXxEVexS }, 0 }, + { "VcomisYX", { XMScalar, EXd, EXxEVexS }, 0 }, { Bad_Opcode }, - { "%XEVcomisYX", { XMScalar, EXq, EXxEVexS }, 0 }, + { "VcomisYX", { XMScalar, EXq, EXxEVexS }, 0 }, }, /* PREFIX_0F51 */ diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 502264cb78a..153efb41939 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -1930,10 +1930,10 @@ vcvtps2ph, 0x661d, F16C, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Uns <fma:opc, 132:10, 213:20, 231:30> -<sdh:cpu:cpudq:fma:ppfx:spfx:pfx:spc1:spc2:opc:vex:vexlig:vexw:elem, + - s:AVX512F:AVX512DQ:FMA|AVX512F::f3:66:Space0F:Space0F38:0:Vex|EVexDYN:VexLIG|EVexLIG:VexW0:Dword, + - d:AVX512F:AVX512DQ:FMA|AVX512F:66:f2:66:Space0F:Space0F38:1:Vex|EVexDYN:VexLIG|EVexLIG:VexW1:Qword, + - h:AVX512_FP16:AVX512_FP16:AVX512_FP16::f3::Map5:Map6:0::EVexLIG:VexW0:Word> +<sdh:cpu:cpudq:fma:ppfx:spfx:pfx:spc1:spc2:opc:vex:vexlig:vexw:elem:sdisp8, + + s:AVX512F:AVX512DQ:FMA|AVX512F::f3:66:Space0F:Space0F38:0:Vex|EVexDYN:VexLIG|EVexLIG:VexW0:Dword:Disp8MemShift=2, + + d:AVX512F:AVX512DQ:FMA|AVX512F:66:f2:66:Space0F:Space0F38:1:Vex|EVexDYN:VexLIG|EVexLIG:VexW1:Qword:Disp8MemShift=3, + + h:AVX512_FP16:AVX512_FP16:AVX512_FP16::f3::Map5:Map6:0::EVexLIG:VexW0:Word:Disp8MemShift=1> v<fm><fma>p<sdh>, 0x66<fm:opc3> | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vex>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } v<fm><fma>s<sdh>, 0x66<fm:opc3> | 1 | 0x<fma:opc>, <sdh:fma>, Modrm|<sdh:vexlig>|Masking|<sdh:spc2>|Src1VVVV|<sdh:vexw>|Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM } @@ -3510,4 +3510,15 @@ vcvttss2<sign>sis, 0xf3<sign:opc>, AVX10_2, Modrm|Map5|EVexLIG|Disp8MemShift=2|N <sign> +vminmaxpbf16, 0xf252, AVX10_2, Modrm|Masking|Space0F3A|Src1VVVV|VexW0|Disp8ShiftVL|Broadcast|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } +vminmaxp<sdh>, 0x<sdh:pfx>52, AVX10_2, Modrm|Masking|Space0F3A|<sdh:vexw>|Broadcast|Src1VVVV|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { Imm8, RegXMM|RegYMM|RegZMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } +vminmaxs<sdh>, 0x<sdh:pfx>53, AVX10_2, Modrm|EVexLIG|Masking|Space0F3A|Src1VVVV|<sdh:vexw>|<sdh:sdisp8>|CheckOperandSize|NoSuf|SAE, { Imm8, RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM, RegXMM } + +vmovd, 0xf37e, AVX10_2, Load|Modrm|EVex128|VexW0|Space0F|Disp8MemShift=2|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } +vmovd, 0x66d6, AVX10_2, Modrm|EVex128|VexW0|Space0F|Disp8MemShift=2|NoSuf, { RegXMM, Dword|Unspecified|BaseIndex|RegXMM } +vmovw, 0xf36e, AVX10_2, D|Modrm|EVex128|VexW0|Map5|Disp8MemShift=1|NoSuf, { Word|Unspecified|BaseIndex|RegXMM, RegXMM } + +vcomxs<sdh>, 0x<sdh:spfx>2f, AVX10_2, Modrm|EVexLIG|<sdh:spc1>|<sdh:vexw>|<sdh:sdisp8>|NoSuf|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM } +vucomxs<sdh>, 0x<sdh:spfx>2e, AVX10_2, Modrm|EVexLIG|<sdh:spc1>|<sdh:vexw>|<sdh:sdisp8>|NoSuf|SAE, { RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegXMM } + // AVX10.2 instructions end. -- 2.31.1
