From: yulong <shiyul...@iscas.ac.cn>

This patch implements the Sifvie vendor extension Xsfvqmaccqoq and
Xsfvqmaccdod[1] support to gcc. Providing intrinsic functions vqmacc
(signed-signed mac), vqmaccu (unsigned-unsignedmac), vqmaccsu
(signed-unsigned mac), vqmaccus (unsigned-signed mac) for 4x8x4 and
2x8x2 martix multiplication operations.

[1] 
https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification

Co-Authored by: Kito Cheng <kito.ch...@sifive.com>
Co-Authored by: Monk Chiang <monk.chi...@sifive.com>
Co-Authored by: Jiawei Chen <jia...@iscas.ac.cn>
Co-Authored by: Shihua Liao <shi...@iscas.ac.cn>
Co-Authored by: Yixuan Chen <chenyix...@iscas.ac.cn>

yulong (2):
  RISC-V: Add intrinsics support for SiFive Xsfvqmaccqoq/dod extensions.
  RISC-V: Add intrinsics testcases for SiFive Xsfvqmaccqoq/dod
    extensions.

 gcc/config.gcc                                |   2 +-
 gcc/config/riscv/generic-vector-ooo.md        |   2 +-
 gcc/config/riscv/genrvv-type-indexer.cc       |  47 ++++
 .../riscv/riscv-vector-builtins-shapes.cc     |  30 +++
 .../riscv/riscv-vector-builtins-shapes.h      |   2 +
 .../riscv/riscv-vector-builtins-types.def     |  12 +
 gcc/config/riscv/riscv-vector-builtins.cc     | 151 ++++++++++++-
 gcc/config/riscv/riscv-vector-builtins.def    |  26 ++-
 gcc/config/riscv/riscv-vector-builtins.h      |  14 ++
 gcc/config/riscv/riscv.md                     |   4 +-
 .../riscv/sifive-vector-builtins-bases.cc     | 164 ++++++++++++++
 .../riscv/sifive-vector-builtins-bases.h      |  35 +++
 .../sifive-vector-builtins-functions.def      |  54 +++++
 gcc/config/riscv/sifive-vector.md             | 179 +++++++++++++++
 gcc/config/riscv/t-riscv                      |  20 ++
 gcc/config/riscv/vector-iterators.md          |  33 +++
 gcc/config/riscv/vector.md                    |   1 +
 gcc/testsuite/gcc.target/riscv/rvv/rvv.exp    |   2 +
 .../riscv/rvv/xsfvector/sf_vqmacc_2x8x2.c     | 213 ++++++++++++++++++
 .../riscv/rvv/xsfvector/sf_vqmacc_4x8x4.c     | 213 ++++++++++++++++++
 .../riscv/rvv/xsfvector/sf_vqmaccsu_2x8x2.c   | 213 ++++++++++++++++++
 .../riscv/rvv/xsfvector/sf_vqmaccsu_4x8x4.c   | 213 ++++++++++++++++++
 .../riscv/rvv/xsfvector/sf_vqmaccu_2x8x2.c    | 213 ++++++++++++++++++
 .../riscv/rvv/xsfvector/sf_vqmaccu_4x8x4.c    | 213 ++++++++++++++++++
 .../riscv/rvv/xsfvector/sf_vqmaccus_2x8x2.c   | 213 ++++++++++++++++++
 .../riscv/rvv/xsfvector/sf_vqmaccus_4x8x4.c   | 213 ++++++++++++++++++
 26 files changed, 2463 insertions(+), 19 deletions(-)
 create mode 100644 gcc/config/riscv/sifive-vector-builtins-bases.cc
 create mode 100644 gcc/config/riscv/sifive-vector-builtins-bases.h
 create mode 100644 gcc/config/riscv/sifive-vector-builtins-functions.def
 create mode 100644 gcc/config/riscv/sifive-vector.md
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmacc_2x8x2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmacc_4x8x4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccsu_2x8x2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccsu_4x8x4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccu_2x8x2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccu_4x8x4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccus_2x8x2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/xsfvector/sf_vqmaccus_4x8x4.c

-- 
2.34.1

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