From: Pan Li <pan2...@intel.com>
After we support the vec_duplicate + vadd.vv combine to vadd.vx, the
existing testcases need some adjust for asm dump check times.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c: Adjust
the asm dump check times.
* gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv.c: Ditto.
* gcc.target/riscv/struct_vect_24.c: Ditto.
Signed-off-by: Pan Li <pan2...@intel.com>
---
.../gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c | 3 ++-
.../gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv.c | 3 ++-
.../gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c | 3 ++-
.../gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv.c | 3 ++-
gcc/testsuite/gcc.target/riscv/struct_vect_24.c | 6 +++---
5 files changed, 11 insertions(+), 7 deletions(-)
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c
index 667f457d658..7db55b298d1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv-nofm.c
@@ -3,7 +3,8 @@
#include "vadd-template.h"
-/* { dg-final { scan-assembler-times {\tvadd\.vv} 16 } } */
+/* { dg-final { scan-assembler-times {\tvadd\.vv} 10 } } */
+/* { dg-final { scan-assembler-times {\tvadd\.vx} 6 } } */
/* { dg-final { scan-assembler-times {\tvadd\.vi} 8 } } */
/* { dg-final { scan-assembler-times {\tvfadd\.vv} 3 } } */
/* { dg-final { scan-assembler-times {\tvfadd\.vf} 6 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv.c
index a3b012631be..65e569d9d1c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv32gcv.c
@@ -3,6 +3,7 @@
#include "vadd-template.h"
-/* { dg-final { scan-assembler-times {\tvadd\.vv} 16 } } */
+/* { dg-final { scan-assembler-times {\tvadd\.vv} 10 } } */
+/* { dg-final { scan-assembler-times {\tvadd\.vx} 6 } } */
/* { dg-final { scan-assembler-times {\tvadd\.vi} 8 } } */
/* { dg-final { scan-assembler-times {\tvfadd\.vv} 9 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c
index 1d8a19ce0b2..4a48fce435e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv-nofm.c
@@ -3,7 +3,8 @@
#include "vadd-template.h"
-/* { dg-final { scan-assembler-times {\tvadd\.vv} 16 } } */
+/* { dg-final { scan-assembler-times {\tvadd\.vv} 8 } } */
+/* { dg-final { scan-assembler-times {\tvadd\.vx} 8 } } */
/* { dg-final { scan-assembler-times {\tvadd\.vi} 8 } } */
/* { dg-final { scan-assembler-times {\tvfadd\.vv} 3 } } */
/* { dg-final { scan-assembler-times {\tvfadd\.vf} 6 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv.c
index ef52f49657b..1cf6c06ecca 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-rv64gcv.c
@@ -3,6 +3,7 @@
#include "vadd-template.h"
-/* { dg-final { scan-assembler-times {\tvadd\.vv} 16 } } */
+/* { dg-final { scan-assembler-times {\tvadd\.vv} 8 } } */
+/* { dg-final { scan-assembler-times {\tvadd\.vx} 8 } } */
/* { dg-final { scan-assembler-times {\tvadd\.vi} 8 } } */
/* { dg-final { scan-assembler-times {\tvfadd\.vv} 9 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/struct_vect_24.c
b/gcc/testsuite/gcc.target/riscv/struct_vect_24.c
index 7c0852f1a55..9d36796f2ec 100644
--- a/gcc/testsuite/gcc.target/riscv/struct_vect_24.c
+++ b/gcc/testsuite/gcc.target/riscv/struct_vect_24.c
@@ -42,6 +42,6 @@ TEST (test)
/* Check the vectorized loop for stack clash probing. */
-/* { dg-final { scan-assembler-times {sd\tzero,1024\(sp\)} 6 } } */
-/* { dg-final { scan-assembler-times {bge\tt1,t0,.[^\\r\\n]*} 2 } } */
-/* { dg-final { scan-assembler-times {sub\s+t1,t1,t0} 2 } } */
+/* { dg-final { scan-assembler-times {sd\tzero,1024\(sp\)} 4 } } */
+/* { dg-final { scan-assembler-not {bge\tt1,t0,.[^\\r\\n]*} } } */
+/* { dg-final { scan-assembler-not {sub\s+t1,t1,t0} } } */
--
2.43.0
