From: Pan Li <pan2...@intel.com> Some forms like below failed to recog the SAT_ADD pattern for target i386. It is related to some match pattern extraction but get fixed after the refactor of the SAT_ADD pattern. Thus, add testcases to ensure we may have similar issue in futrue.
#define DEF_SAT_ADD(T) \ T sat_add_##T (T x, T y) \ { \ T res; \ res = x + y; \ res |= -(T)(res < x); \ return res; \ } #define VEC_DEF_SAT_ADD(T) \ void vec_sat_add(T * restrict a, T * restrict b) \ { \ for (int i = 0; i < 8; i++) \ b[i] = sat_add_##T (a[i], b[i]); \ } DEF_SAT_ADD (uint32_t) VEC_DEF_SAT_ADD (uint32_t) The below test suites are passed for this patch. make -k check-gcc RUNTESTFLAGS="--target_board=unix\{,-m32\} i386.exp=pr112600-5a-*.c" PR target/112600 gcc/testsuite/ChangeLog: * gcc.target/i386/pr112600-5a-u16.c: New test. * gcc.target/i386/pr112600-5a-u32.c: New test. * gcc.target/i386/pr112600-5a-u64.c: New test. * gcc.target/i386/pr112600-5a-u8.c: New test. * gcc.target/i386/pr112600-5a.h: New test. Signed-off-by: Pan Li <pan2...@intel.com> --- .../gcc.target/i386/pr112600-5a-u16.c | 10 +++++++++ .../gcc.target/i386/pr112600-5a-u32.c | 9 ++++++++ .../gcc.target/i386/pr112600-5a-u64.c | 10 +++++++++ .../gcc.target/i386/pr112600-5a-u8.c | 10 +++++++++ gcc/testsuite/gcc.target/i386/pr112600-5a.h | 22 +++++++++++++++++++ 5 files changed, 61 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr112600-5a-u16.c create mode 100644 gcc/testsuite/gcc.target/i386/pr112600-5a-u32.c create mode 100644 gcc/testsuite/gcc.target/i386/pr112600-5a-u64.c create mode 100644 gcc/testsuite/gcc.target/i386/pr112600-5a-u8.c create mode 100644 gcc/testsuite/gcc.target/i386/pr112600-5a.h diff --git a/gcc/testsuite/gcc.target/i386/pr112600-5a-u16.c b/gcc/testsuite/gcc.target/i386/pr112600-5a-u16.c new file mode 100644 index 00000000000..f462bfa4800 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr112600-5a-u16.c @@ -0,0 +1,10 @@ +/* PR target/112600 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -fdump-tree-optimized" } */ + +#include "pr112600-5a.h" + +DEF_SAT_ADD (uint16_t) +VEC_DEF_SAT_ADD (uint16_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 3 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr112600-5a-u32.c b/gcc/testsuite/gcc.target/i386/pr112600-5a-u32.c new file mode 100644 index 00000000000..5797c97ebe9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr112600-5a-u32.c @@ -0,0 +1,9 @@ +/* PR target/112600 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -fdump-tree-optimized" } */ + +#include "pr112600-5a.h" + +DEF_SAT_ADD (uint32_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr112600-5a-u64.c b/gcc/testsuite/gcc.target/i386/pr112600-5a-u64.c new file mode 100644 index 00000000000..d5f81f72ed5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr112600-5a-u64.c @@ -0,0 +1,10 @@ +/* PR target/112600 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -msse2 -fdump-tree-optimized" } */ + +#include "pr112600-5a.h" + +DEF_SAT_ADD (uint64_t) + + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr112600-5a-u8.c b/gcc/testsuite/gcc.target/i386/pr112600-5a-u8.c new file mode 100644 index 00000000000..cb8657ecd86 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr112600-5a-u8.c @@ -0,0 +1,10 @@ +/* PR target/112600 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -fdump-tree-optimized" } */ + +#include "pr112600-5a.h" + +DEF_SAT_ADD (uint8_t) +VEC_DEF_SAT_ADD (uint8_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr112600-5a.h b/gcc/testsuite/gcc.target/i386/pr112600-5a.h new file mode 100644 index 00000000000..482c865e953 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr112600-5a.h @@ -0,0 +1,22 @@ +#ifndef HAVE_DEFINED_PR112600_5A_H +#define HAVE_DEFINED_PR112600_5A_H + +#include <stdint.h> + +#define DEF_SAT_ADD(T) \ +T sat_add_##T (T x, T y) \ +{ \ + T res; \ + res = x + y; \ + res |= -(T)(res < x); \ + return res; \ +} + +#define VEC_DEF_SAT_ADD(T) \ +void vec_sat_add(T * restrict a, T * restrict b) \ +{ \ + for (int i = 0; i < 16; i++) \ + b[i] = sat_add_##T (a[i], b[i]); \ +} + +#endif -- 2.43.0