On 11/26/24 13:42, Torbjörn SVENSSON wrote:
Hi,
Sorry for the mess. I'm not sure how I managed to miss this...
Maybe I tested the GCC15 binaries on the GCC14 test tree.
Anyway, here is a fix that uses the assembler generated in GCC14.
The csinc instruction was introduced in r15-1579-g792f97b44ff that
was not backported.
Ok for releases/gcc-14?
--
In r14.2.0-376-g724446556e5, I accidentally introduced a regression in
the expected assembler as the csinc instruction was not used for
armv8.1-m.main.
The generated assembler for armv8.1-m.main is:
push {r3, r4, r5, lr}
ldr r4, .L5
ldr r5, [r4]
adds r4, r2, #1
tst r5, #4
it ne
movne r2, r4
bl bar
movs r0, #0
pop {r3, r4, r5, pc}
gcc/testsuite/ChangeLog:
* gcc.target/arm/epilog-1.c: Corrected armv8.1.m-main asm.
OK, thanks.
Christophe
Signed-off-by: Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
---
gcc/testsuite/gcc.target/arm/epilog-1.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/arm/epilog-1.c
b/gcc/testsuite/gcc.target/arm/epilog-1.c
index a1516456460..d765dc42b82 100644
--- a/gcc/testsuite/gcc.target/arm/epilog-1.c
+++ b/gcc/testsuite/gcc.target/arm/epilog-1.c
@@ -20,8 +20,10 @@ Below block is for non-armv8.1-m.main
** |
Below block is for armv8.1-m.main
+** adds (r[0-9]+), r2, #1
** tst r[0-9]+, #4
-** csinc r2, r2, r2, eq
+** it ne
+** movne r2, \1
** )
** bl bar
