This is a no-op refactoring that uses a prefix of avropt_
(formerly: avr_) for variables defined qua Var() directives
in avr.opt.  This makes it easier to spot values that come directly
from avr.opt in the rest of the backend.

Ok for trunk?

Johann

--

AVR: Use Var(avropt_xxx) for option variables in avr.opt.

This is a no-op refactoring that uses a prefix of avropt_
(formerly: avr_) for variables defined qua Var() directives
in avr.opt.  This makes it easier to spot values that come directly
from avr.opt.

gcc/
        * config/avr/avr.opt (avr_bits_e, avr_lra_p, avr_mmcu)
        (avr_gasisr_prologues, avr_n_flash, avr_log_details)
        (avr_branch_cost, avr_split_bit_shift, avr_strict_X)
        (avr_flmap, avr_rodata_in_ram, avr_sp8, avr_fuse_add)
        (avr_warn_addr_space_convert, avr_warn_misspelled_isr)
        (avr_fuse_move, avr_double, avr_long_double): Rename
        to respectively: avropt_bits_e, avropt_lra_p, avropt_mmcu,
        avropt_gasisr_prologues, avropt_n_flash, avropt_log_details,
        avropt_branch_cost, avropt_split_bit_shift, avropt_strict_X,
        avropt_flmap, avropt_rodata_in_ram, avropt_sp8, avropt_fuse_add,
        avropt_warn_addr_space_convert, avropt_warn_misspelled_isr,
        avropt_fuse_move, avropt_double, avropt_long_double.
        * config/avr/avr.h: Same.
        * config/avr/avr.cc: Same.
        * config/avr/avr.md: Same.
        * config/avr/avr-passes.cc
        * config/avr/avr-log.cc: Same.
        * common/config/avr/avr-common.cc: Same.
diff --git a/gcc/config/avr/avr-log.cc b/gcc/config/avr/avr-log.cc
index 6f567d845e1..c48b0fbb6a6 100644
--- a/gcc/config/avr/avr-log.cc
+++ b/gcc/config/avr/avr-log.cc
@@ -342,17 +342,17 @@ avr_log_set_avr_log (void)
   bool all = TARGET_ALL_DEBUG != 0;
 
   if (all)
-    avr_log_details = "all";
+    avropt_log_details = "all";
 
-  if (all || avr_log_details)
+  if (all || avropt_log_details)
     {
       /* Adding , at beginning and end of string makes searching easier.  */
 
-      char *str = (char*) alloca (3 + strlen (avr_log_details));
+      char *str = (char*) alloca (3 + strlen (avropt_log_details));
       bool info;
 
       str[0] = ',';
-      strcat (stpcpy (str+1, avr_log_details), ",");
+      strcat (stpcpy (str+1, avropt_log_details), ",");
 
       all |= strstr (str, ",all,") != NULL;
       info = strstr (str, ",?,") != NULL;
diff --git a/gcc/config/avr/avr-passes.cc b/gcc/config/avr/avr-passes.cc
index b854f186a7a..57c3fed1e41 100644
--- a/gcc/config/avr/avr-passes.cc
+++ b/gcc/config/avr/avr-passes.cc
@@ -1227,7 +1227,7 @@ public:
 
   unsigned int execute (function *func) final override
   {
-    if (optimize > 0 && avr_fuse_move > 0)
+    if (optimize > 0 && avropt_fuse_move > 0)
       {
 	df_note_add_problem ();
 	df_analyze ();
@@ -3181,13 +3181,13 @@ bbinfo_t::optimize_one_function (function *func)
   // use arith                                     1 1 1 1  1 1 1 1      3
 
   // Which optimization(s) to perform.
-  bbinfo_t::try_fuse_p = avr_fuse_move & 0x1;      // Digit 0 in [0, 1].
-  bbinfo_t::try_bin_arg1_p = avr_fuse_move & 0x2;  // Digit 1 in [0, 1].
-  bbinfo_t::try_split_any_p = avr_fuse_move & 0x4; // Digit 2 in [0, 1].
-  bbinfo_t::try_split_ldi_p = avr_fuse_move >> 3;       // Digit 3 in [0, 2].
-  bbinfo_t::use_arith_p = (avr_fuse_move >> 3) >= 2;    // Digit 3 in [0, 2].
+  bbinfo_t::try_fuse_p = avropt_fuse_move & 0x1;      // Digit 0 in [0, 1].
+  bbinfo_t::try_bin_arg1_p = avropt_fuse_move & 0x2;  // Digit 1 in [0, 1].
+  bbinfo_t::try_split_any_p = avropt_fuse_move & 0x4; // Digit 2 in [0, 1].
+  bbinfo_t::try_split_ldi_p = avropt_fuse_move >> 3;    // Digit 3 in [0, 2].
+  bbinfo_t::use_arith_p = (avropt_fuse_move >> 3) >= 2; // Digit 3 in [0, 2].
   bbinfo_t::use_set_some_p = bbinfo_t::try_split_ldi_p; // Digit 3 in [0, 2].
-  bbinfo_t::try_simplify_p = avr_fuse_move != 0;
+  bbinfo_t::try_simplify_p = avropt_fuse_move != 0;
 
   // Topologically sort BBs from last to first.
 
@@ -4221,7 +4221,7 @@ public:
     func->machine->n_avr_fuse_add_executed += 1;
     n_avr_fuse_add_executed = func->machine->n_avr_fuse_add_executed;
 
-    if (optimize && avr_fuse_add > 0)
+    if (optimize && avropt_fuse_add > 0)
       return execute1 (func);
     return 0;
   }
@@ -4349,7 +4349,7 @@ avr_maybe_adjust_cfa (rtx_insn *insn, rtx reg, int addend)
   if (addend
       && frame_pointer_needed
       && REGNO (reg) == FRAME_POINTER_REGNUM
-      && avr_fuse_add == 3)
+      && avropt_fuse_add == 3)
     {
       rtx plus = plus_constant (Pmode, reg, addend);
       RTX_FRAME_RELATED_P (insn) = 1;
@@ -4443,7 +4443,7 @@ avr_pass_fuse_add::avr_pass_fuse_add::Mem_Insn::Mem_Insn (rtx_insn *insn)
 
   addr_regno = REGNO (addr_reg);
 
-  if (avr_fuse_add == 2
+  if (avropt_fuse_add == 2
       && frame_pointer_needed
       && addr_regno == FRAME_POINTER_REGNUM)
     MEM_VOLATILE_P (mem) = 0;
@@ -4829,7 +4829,7 @@ avr_shift_is_3op ()
   // For OPTIMIZE_SIZE_BALANCED (-Os), we still split because
   // the size overhead (if exists at all) is marginal.
 
-  return (avr_split_bit_shift
+  return (avropt_split_bit_shift
 	  && optimize > 0
 	  && avr_optimize_size_level () < OPTIMIZE_SIZE_MAX);
 }
@@ -4947,7 +4947,7 @@ public:
 
   unsigned int execute (function *fun) final override
   {
-    if (avr_gasisr_prologues
+    if (avropt_gasisr_prologues
 	// Whether this function is an ISR worth scanning at all.
 	&& !fun->machine->is_no_gccisr
 	&& (fun->machine->is_interrupt
@@ -5100,15 +5100,15 @@ avr_split_fake_addressing_move (rtx_insn * /*insn*/, rtx *xop)
   if (frame_pointer_needed
       && REGNO (base) == FRAME_POINTER_REGNUM)
     {
-      if (avr_fuse_add < 2
+      if (avropt_fuse_add < 2
 	  // Be a projection (we always split PLUS).
-	  || (avr_fuse_add == 2 && volatile_p && addr_code != PLUS))
+	  || (avropt_fuse_add == 2 && volatile_p && addr_code != PLUS))
 	return false;
 
       // Changing the frame pointer locally may confuse later passes
       // like .dse2 which don't track changes of FP, not even when
       // respective CFA notes are present.  An example is pr22141-1.c.
-      if (avr_fuse_add == 2)
+      if (avropt_fuse_add == 2)
 	mem_volatile_p = true;
     }
 
diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
index d74b20e798e..cc13dae9bfe 100644
--- a/gcc/config/avr/avr.cc
+++ b/gcc/config/avr/avr.cc
@@ -390,7 +390,7 @@ avr_adiw_reg_p (rtx reg)
 static bool
 ra_in_progress ()
 {
-  return avr_lra_p ? lra_in_progress : reload_in_progress;
+  return avropt_lra_p ? lra_in_progress : reload_in_progress;
 }
 
 
@@ -402,8 +402,8 @@ avr_set_core_architecture (void)
 {
   /* Search for mcu core architecture.  */
 
-  if (!avr_mmcu)
-    avr_mmcu = AVR_MMCU_DEFAULT;
+  if (!avropt_mmcu)
+    avropt_mmcu = AVR_MMCU_DEFAULT;
 
   avr_arch = &avr_arch_types[0];
 
@@ -417,18 +417,18 @@ avr_set_core_architecture (void)
 	     with -mmcu=<device>. */
 
 	  error ("unknown core architecture %qs specified with %qs",
-		 avr_mmcu, "-mmcu=");
+		 avropt_mmcu, "-mmcu=");
 	  avr_inform_core_architectures ();
 	  break;
 	}
-      else if (strcmp (mcu->name, avr_mmcu) == 0
+      else if (strcmp (mcu->name, avropt_mmcu) == 0
 	       // Is this a proper architecture ?
 	       && mcu->macro == NULL)
 	{
 	  avr_arch = &avr_arch_types[mcu->arch_id];
 	  avr_arch_index = mcu->arch_id;
-	  if (avr_n_flash < 0)
-	    avr_n_flash = 1 + (mcu->flash_size - 1) / 0x10000;
+	  if (avropt_n_flash < 0)
+	    avropt_n_flash = 1 + (mcu->flash_size - 1) / 0x10000;
 
 	  return true;
 	}
@@ -451,7 +451,7 @@ avr_option_override (void)
      with the challenge of AVR's very few address registers and fails to
      perform the requested spills.  */
 
-  if (avr_strict_X)
+  if (avropt_strict_X)
     flag_caller_saves = 0;
 
   /* Unwind tables currently require a frame pointer for correctness,
@@ -485,14 +485,14 @@ avr_option_override (void)
     warning (OPT_fPIE, "%<-fPIE%> is not supported");
 
 #if !defined (HAVE_AS_AVR_MGCCISR_OPTION)
-  avr_gasisr_prologues = 0;
+  avropt_gasisr_prologues = 0;
 #endif
 
   if (!avr_set_core_architecture())
     return;
 
   /* Sould be set by avr-common.cc */
-  gcc_assert (avr_long_double >= avr_double && avr_double >= 32);
+  gcc_assert (avropt_long_double >= avropt_double && avropt_double >= 32);
 
   /* RAM addresses of some SFRs common to all devices in respective arch. */
 
@@ -3182,7 +3182,7 @@ avr_xload_libgcc_p (machine_mode mode)
   int n_bytes = GET_MODE_SIZE (mode);
 
   return (n_bytes > 1
-	  || avr_n_flash > 1);
+	  || avropt_n_flash > 1);
 }
 
 
@@ -8182,7 +8182,7 @@ avr_out_plus_1 (rtx insn, rtx *xop, int *plen, rtx_code code,
 	  // When that pass adjusts the frame pointer, then we know that
 	  // reg Y points to ordinary memory, and the only side-effect
 	  // of -Y and Y+ is the side effect on Y.
-	  && avr_fuse_add >= 2
+	  && avropt_fuse_add >= 2
 	  && frame_pointer_needed
 	  && REGNO (xop[0]) == FRAME_POINTER_REGNUM)
 	{
@@ -10742,12 +10742,12 @@ avr_addr_space_supported_p (addr_space_t as, location_t loc)
 		  "Tiny devices");
       return false;
     }
-  else if (avr_addrspace[as].segment >= avr_n_flash)
+  else if (avr_addrspace[as].segment >= avropt_n_flash)
     {
       if (loc != UNKNOWN_LOCATION)
 	error_at (loc, "address space %qs not supported for devices with "
 		  "flash size up to %d KiB", avr_addrspace[as].name,
-		  64 * avr_n_flash);
+		  64 * avropt_n_flash);
       return false;
     }
 
@@ -11070,10 +11070,10 @@ avr_rodata_in_flash_p ()
       return have_avrxmega3_rodata_in_flash;
 
     case ARCH_AVRXMEGA2:
-      return avr_flmap && have_avrxmega2_flmap && avr_rodata_in_ram != 1;
+      return avropt_flmap && have_avrxmega2_flmap && avropt_rodata_in_ram != 1;
 
     case ARCH_AVRXMEGA4:
-      return avr_flmap && have_avrxmega4_flmap && avr_rodata_in_ram != 1;
+      return avropt_flmap && have_avrxmega4_flmap && avropt_rodata_in_ram != 1;
     }
 
   return false;
@@ -11550,7 +11550,7 @@ avr_file_start (void)
   int sfr_offset = avr_arch->sfr_offset;
 
   if (avr_arch->asm_only)
-    error ("architecture %qs supported for assembler only", avr_mmcu);
+    error ("architecture %qs supported for assembler only", avropt_mmcu);
 
   default_file_start ();
 
@@ -13143,7 +13143,7 @@ avr_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
   if (GET_MODE_SIZE (mode) >= 4
       && regno >= REG_X
       // This problem only concerned the old reload.
-      && ! avr_lra_p)
+      && ! avropt_lra_p)
     return false;
 
   /* All modes larger than 8 bits should start in an even register.  */
@@ -13192,7 +13192,7 @@ avr_mode_code_base_reg_class (machine_mode /*mode*/, addr_space_t as,
     // will rectify it (register allocation cannot do it).
     return POINTER_REGS;
 
-  if (!avr_strict_X)
+  if (!avropt_strict_X)
     return reload_completed ? BASE_POINTER_REGS : POINTER_REGS;
 
   return PLUS == outer_code ? BASE_POINTER_REGS : POINTER_REGS;
@@ -13250,7 +13250,7 @@ avr_regno_mode_code_ok_for_base_p (int regno, machine_mode /*mode*/,
 	}
     }
 
-  if (avr_strict_X
+  if (avropt_strict_X
       // On Reduced Tiny, all registers are equal in that they do not
       // support PLUS addressing; respective addresses will be fake,
       // even for the frame pointer.  They must be handled in the
@@ -13924,7 +13924,7 @@ avr_convert_to_type (tree type, tree expr)
 	    code with progmem and pgm_read_xxx.
   */
 
-  if (avr_warn_addr_space_convert
+  if (avropt_warn_addr_space_convert
       && expr != error_mark_node
       && POINTER_TYPE_P (type)
       && POINTER_TYPE_P (TREE_TYPE (expr)))
@@ -14136,7 +14136,7 @@ avr_emit_cpymemhi (rtx *xop)
       int segment = avr_addrspace[as].segment;
 
       if (segment
-	  && avr_n_flash > 1)
+	  && avropt_n_flash > 1)
 	{
 	  a_hi8 = GEN_INT (segment);
 	  emit_move_insn (rampz_rtx, a_hi8 = copy_to_mode_reg (QImode, a_hi8));
@@ -15415,9 +15415,9 @@ static machine_mode
 avr_c_mode_for_floating_type (tree_index ti)
 {
   if (ti == TI_DOUBLE_TYPE)
-    return avr_double == 32 ? SFmode : DFmode;
+    return avropt_double == 32 ? SFmode : DFmode;
   if (ti == TI_LONG_DOUBLE_TYPE)
-    return avr_long_double == 32 ? SFmode : DFmode;
+    return avropt_long_double == 32 ? SFmode : DFmode;
   return default_mode_for_floating_type (ti);
 }
 
@@ -15444,7 +15444,7 @@ avr_float_lib_compare_returns_bool (machine_mode mode, rtx_code)
 static bool
 avr_use_lra_p ()
 {
-  return avr_lra_p;
+  return avropt_lra_p;
 }
 
 
diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index 7d887a6579c..2432cd61537 100644
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -94,9 +94,9 @@ FIXME: DRIVER_SELF_SPECS has changed.
    there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__.  */
 
 #define AVR_HAVE_8BIT_SP                        \
-  (TARGET_TINY_STACK || avr_sp8)
+  (TARGET_TINY_STACK || avropt_sp8)
 
-#define AVR_HAVE_SPH (!avr_sp8)
+#define AVR_HAVE_SPH (!avropt_sp8)
 
 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
@@ -374,7 +374,7 @@ typedef struct avr_args
    edges instead.  The default branch costs are 0, mainly because otherwise
    do_store_flag might come up with bloated code.  */
 #define BRANCH_COST(speed_p, predictable_p)     \
-  (avr_branch_cost + (reload_completed ? 4 : 0))
+  (avropt_branch_cost + (reload_completed ? 4 : 0))
 
 #define SLOW_BYTE_ACCESS 0
 
diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md
index eeb2c2b5443..b5536cbf93b 100644
--- a/gcc/config/avr/avr.md
+++ b/gcc/config/avr/avr.md
@@ -1003,7 +1003,7 @@ (define_split
                    (match_operand:MOVMODE 1 "general_operand"))
               (clobber (reg:CC REG_CC))])]
   "reload_completed
-   && avr_fuse_add > 0
+   && avropt_fuse_add > 0
    // Only split this for .split2 when we are before
    // pass .avr-fuse-add (which runs after proep).
    && ! epilogue_completed
@@ -5392,7 +5392,7 @@ (define_split
                    (ashift:ALL4 (match_operand:ALL4 1 "register_operand")
                                 (match_operand:QI 2 "const_int_operand")))
               (clobber (reg:CC REG_CC))])]
-  "avr_split_bit_shift
+  "avropt_split_bit_shift
    && n_avr_fuse_add_executed >= 1
    && satisfies_constraint_C4l (operands[2])"
   [(parallel [(set (match_dup 0)
@@ -5420,7 +5420,7 @@ (define_split
                                 (match_operand:QI 2 "const_int_operand")))
               (clobber (match_operand:QI 3 "scratch_or_d_register_operand"))
               (clobber (reg:CC REG_CC))])]
-  "avr_split_bit_shift
+  "avropt_split_bit_shift
    && n_avr_fuse_add_executed >= 1
    && satisfies_constraint_C4l (operands[2])"
   [(parallel [(set (match_dup 0)
@@ -8494,7 +8494,7 @@ (define_expand "gasisr"
                    (unspec_volatile:BLK [(match_dup 2)]
                                         UNSPECV_MEMORY_BARRIER))
               (clobber (reg:CC REG_CC))])]
-  "avr_gasisr_prologues"
+  "avropt_gasisr_prologues"
   {
     operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
     MEM_VOLATILE_P (operands[2]) = 1;
@@ -8509,7 +8509,7 @@ (define_insn "*gasisr"
    (set (match_operand:BLK 2)
         (unspec_volatile:BLK [(match_dup 2)] UNSPECV_MEMORY_BARRIER))
    (clobber (reg:CC REG_CC))]
-  "avr_gasisr_prologues"
+  "avropt_gasisr_prologues"
   "__gcc_isr %0"
   [(set_attr "length" "6,5")])
 
diff --git a/gcc/config/avr/avr.opt b/gcc/config/avr/avr.opt
index 1b7e967dfc8..7770c278d40 100644
--- a/gcc/config/avr/avr.opt
+++ b/gcc/config/avr/avr.opt
@@ -19,7 +19,7 @@
 ; <http://www.gnu.org/licenses/>.
 
 mlra
-Target Var(avr_lra_p) UInteger Init(0) Optimization Undocumented
+Target Var(avropt_lra_p) UInteger Init(0) Optimization Undocumented
 Usa LRA for reload instead of the old reload framework.  This option is experimental, and it may be removed in future versions of the compiler.
 
 mcall-prologues
@@ -27,15 +27,15 @@ Target Mask(CALL_PROLOGUES) Optimization
 Optimization. Use subroutines for function prologues and epilogues.
 
 mmcu=
-Target RejectNegative Joined Var(avr_mmcu) MissingArgError(missing device or architecture after %qs)
+Target RejectNegative Joined Var(avropt_mmcu) MissingArgError(missing device or architecture after %qs)
 -mmcu=<MCU>	Select the target MCU.
 
 mgas-isr-prologues
-Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization
+Target Var(avropt_gasisr_prologues) UInteger Init(0) Optimization
 Optimization. Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues.
 
 mn-flash=
-Target RejectNegative Joined Var(avr_n_flash) UInteger Init(-1)
+Target RejectNegative Joined Var(avropt_n_flash) UInteger Init(-1)
 This option is used internally. Set the number of 64 KiB flash segments.
 
 mskip-bug
@@ -50,7 +50,7 @@ mdeb
 Target Undocumented Mask(ALL_DEBUG)
 
 mlog=
-Target RejectNegative Joined Undocumented Var(avr_log_details)
+Target RejectNegative Joined Undocumented Var(avropt_log_details)
 
 mshort-calls
 Target RejectNegative Mask(SHORT_CALLS)
@@ -65,7 +65,7 @@ Target RejectNegative Mask(NO_INTERRUPTS)
 Change the stack pointer without disabling interrupts.
 
 mbranch-cost=
-Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0) Optimization
+Target Joined RejectNegative UInteger Var(avropt_branch_cost) Init(0) Optimization
 -mbranch-cost=<cost>	Optimization. Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0.
 
 mmain-is-OS_task
@@ -95,24 +95,24 @@ Target Mask(ACCUMULATE_OUTGOING_ARGS) Optimization
 Optimization. Accumulate outgoing function arguments and acquire/release the needed stack space for outgoing function arguments in function prologue/epilogue.  Without this option, outgoing arguments are pushed before calling a function and popped afterwards.  This option can lead to reduced code size for functions that call many functions that get their arguments on the stack like, for example printf.
 
 msplit-bit-shift
-Target Var(avr_split_bit_shift) Init(0) Optimization
+Target Var(avropt_split_bit_shift) Init(0) Optimization
 Optimization. Split shifts of 4-byte values into a byte shift and a residual bit shift.
 
 mstrict-X
-Target Var(avr_strict_X) Init(0) Optimization
+Target Var(avropt_strict_X) Init(0) Optimization
 Optimization. When accessing RAM, use X as imposed by the hardware, i.e. just use pre-decrement, post-increment and indirect addressing with the X register.  Without this option, the compiler may assume that there is an addressing mode X+const similar to Y+const and Z+const and emit instructions to emulate such an addressing mode for X.
 
 mflmap
-Target Var(avr_flmap) Init(0)
+Target Var(avropt_flmap) Init(0)
 This option is used internally. The device has the bitfield NVMCTRL_CTRLB.FLMAP.
 
 mrodata-in-ram
-Target Var(avr_rodata_in_ram) Init(-1)
+Target Var(avropt_rodata_in_ram) Init(-1)
 The device has the .rodata section located in the RAM area.
 
 ;; For rationale behind -msp8 see explanation in avr.h.
 msp8
-Target RejectNegative Var(avr_sp8) Init(0)
+Target RejectNegative Var(avropt_sp8) Init(0)
 This option is used internally for multilib generation and selection. The device has no SPH special function register.
 
 mfuse-add
@@ -120,15 +120,15 @@ Target Alias(mfuse-add=, 2, 0) Optimization
 Optimization. Split register additions from load/store instructions. Most useful on Reduced Tiny.
 
 mfuse-add=
-Target Joined RejectNegative UInteger Var(avr_fuse_add) Init(0) Optimization IntegerRange(0, 3)
+Target Joined RejectNegative UInteger Var(avropt_fuse_add) Init(0) Optimization IntegerRange(0, 3)
 -mfuse-add=<0,2>	Optimization. Split register additions from load/store instructions. Most useful on Reduced Tiny.
 
 Waddr-space-convert
-Warning C Var(avr_warn_addr_space_convert) Init(0)
+Warning C Var(avropt_warn_addr_space_convert) Init(0)
 Warn if the address space of an address is changed.
 
 Wmisspelled-isr
-Warning C C++ Var(avr_warn_misspelled_isr) Init(1)
+Warning C C++ Var(avropt_warn_misspelled_isr) Init(1)
 Warn if the ISR is misspelled, i.e. without __vector prefix. Enabled by default.
 
 mfract-convert-truncate
@@ -140,7 +140,7 @@ Target Alias(mfuse-move=, 23, 0) Optimization
 Optimization. Run a post-reload pass that tweaks move instructions.
 
 mfuse-move=
-Target Joined RejectNegative UInteger Var(avr_fuse_move) Init(0) Optimization IntegerRange(0, 23)
+Target Joined RejectNegative UInteger Var(avropt_fuse_move) Init(0) Optimization IntegerRange(0, 23)
 -mfuse-move=<0,23>	Optimization. Run a post-reload pass that tweaks move instructions.
 
 mabsdata
@@ -148,11 +148,11 @@ Target Mask(ABSDATA)
 Assume that all data in static storage can be accessed by LDS / STS instructions.  This option is only useful for reduced Tiny devices like ATtiny40.
 
 mdouble=
-Target Joined RejectNegative Var(avr_double) Init(0) Enum(avr_bits_e) Save
+Target Joined RejectNegative Var(avropt_double) Init(0) Enum(avropt_bits_e) Save
 -mdouble=<BITS>	Use <BITS> bits wide double type.
 
 mlong-double=
-Target Joined RejectNegative Var(avr_long_double) Init(0) Enum(avr_bits_e) Save
+Target Joined RejectNegative Var(avropt_long_double) Init(0) Enum(avropt_bits_e) Save
 -mlong-double=<BITS>	Use <BITS> bits wide long double type.
 
 nodevicelib
@@ -164,11 +164,11 @@ Driver Target RejectNegative
 Do not use the device-specific specs file device-specs/specs-<MCU>.
 
 Enum
-Name(avr_bits_e) Type(int)
+Name(avropt_bits_e) Type(int)
 Available BITS selections:
 
 EnumValue
-Enum(avr_bits_e) String(32)  Value(32)
+Enum(avropt_bits_e) String(32)  Value(32)
 
 EnumValue
-Enum(avr_bits_e) String(64) Value(64)
+Enum(avropt_bits_e) String(64) Value(64)

Reply via email to