RISC-V vector currently does not support big endian so the postcommit was getting the sorry, not implemented error on vector targets. Restrict the testcase to non-vector targets
gcc/testsuite/ChangeLog: * gcc.target/riscv/pr117595.c: Restrict to non vector targets. Signed-off-by: Edwin Lu <e...@rivosinc.com> --- gcc/testsuite/gcc.target/riscv/pr117595.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/riscv/pr117595.c b/gcc/testsuite/gcc.target/riscv/pr117595.c index a870df08ee4..156b9388d6e 100644 --- a/gcc/testsuite/gcc.target/riscv/pr117595.c +++ b/gcc/testsuite/gcc.target/riscv/pr117595.c @@ -1,4 +1,4 @@ -/* { dg-do compile } */ +/* { dg-do compile { target { ! riscv_v } } } */ /* { dg-options "-mbig-endian" } */ _Atomic enum { E0 } e; -- 2.34.1