> > -----Original Message----- > > From: Xi Ruoyao <xry...@xry111.site> > > Sent: Thursday, November 7, 2024 1:12 PM > > To: Liu, Hongtao <hongtao....@intel.com>; Mayshao-oc <Mayshao- > > o...@zhaoxin.com>; Hongtao Liu <crazy...@gmail.com> > > Cc: gcc-patches@gcc.gnu.org; hubi...@ucw.cz; ubiz...@gmail.com; > > richard.guent...@gmail.com; Tim Hu(WH-RD) <ti...@zhaoxin.com>; Silvia > > Zhao(BJ-RD) <silviaz...@zhaoxin.com>; Louis Qi(BJ-RD) > > <loui...@zhaoxin.com>; Cobe Chen(BJ-RD) <cobec...@zhaoxin.com> > > Subject: Re: [PATCH] [x86_64] Add microarchtecture tunable for > > pass_align_tight_loops > > On Thu, 2024-11-07 at 04:58 +0000, Liu, Hongtao wrote: > > > > > > Hi all: > > > > > > For zhaoxin, I find no improvement when enable > > > > > > pass_align_tight_loops, and have performance drop in some cases. > > > > > > This patch add a new tunable to bypass > > > > > > pass_align_tight_loops in > > > > zhaoxin. > > > > > > > > > > > > Bootstrapped X86_64. > > > > > > Ok for trunk? > > > LGTM. > > > > I'd suggest to add the reference to PR 117438 into the subject and > > ChangeLog. > Yes, thanks. Add PR 117438 into the subject and ChangeLog. > > > > -- > > Xi Ruoyao <xry...@xry111.site> > > School of Aerospace Science and Technology, Xidian University BR Mayshao
0001-x86_64-Add-microarchtecture-tunable-for-pass_align_v2.patch
Description: 0001-x86_64-Add-microarchtecture-tunable-for-pass_align_v2.patch
