This patch adds the priority syntax parser to support the Function Multi-Versioning (FMV) feature in RISC-V. This feature allows users to specify the priority of the function version in the attribute syntax.
Chnages based on RISC-V C-API PR: https://github.com/riscv-non-isa/riscv-c-api-doc/pull/85 Signed-off-by: Yangyu Chen <c...@cyyself.name> gcc/ChangeLog: * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::handle_priority): New function. (riscv_target_attr_parser::update_settings): Update priority attribute. * config/riscv/riscv.opt: Add TargetVariable riscv_fmv_priority. --- gcc/config/riscv/riscv-target-attr.cc | 24 ++++++++++++++++++++++++ gcc/config/riscv/riscv.opt | 3 +++ 2 files changed, 27 insertions(+) diff --git a/gcc/config/riscv/riscv-target-attr.cc b/gcc/config/riscv/riscv-target-attr.cc index 8ce9607b3c9..293d5321215 100644 --- a/gcc/config/riscv/riscv-target-attr.cc +++ b/gcc/config/riscv/riscv-target-attr.cc @@ -39,16 +39,19 @@ public: : m_found_arch_p (false) , m_found_tune_p (false) , m_found_cpu_p (false) + , m_found_priority_p (false) , m_subset_list (nullptr) , m_loc (loc) , m_cpu_info (nullptr) , m_tune (nullptr) + , m_priority (0) { } bool handle_arch (const char *); bool handle_cpu (const char *); bool handle_tune (const char *); + bool handle_priority (const char *); void update_settings (struct gcc_options *opts) const; private: @@ -58,10 +61,12 @@ private: bool m_found_arch_p; bool m_found_tune_p; bool m_found_cpu_p; + bool m_found_priority_p; riscv_subset_list *m_subset_list; location_t m_loc; const riscv_cpu_info *m_cpu_info; const char *m_tune; + int m_priority; }; } @@ -210,6 +215,22 @@ riscv_target_attr_parser::handle_tune (const char *str) return true; } +bool +riscv_target_attr_parser::handle_priority (const char *str) +{ + if (m_found_priority_p) + error_at (m_loc, "%<target()%> attribute: priority appears more than once"); + m_found_priority_p = true; + + if (sscanf (str, "%d", &m_priority) != 1) + { + error_at (m_loc, "%<target()%> attribute: invalid priority %qs", str); + return false; + } + + return true; +} + void riscv_target_attr_parser::update_settings (struct gcc_options *opts) const { @@ -236,6 +257,9 @@ riscv_target_attr_parser::update_settings (struct gcc_options *opts) const if (m_cpu_info) opts->x_riscv_tune_string = m_cpu_info->tune; } + + if (m_priority) + opts->x_riscv_fmv_priority = m_priority; } /* Parse ARG_STR which contains the definition of one target attribute. diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt index 5bc5d300293..ab9d6e82723 100644 --- a/gcc/config/riscv/riscv.opt +++ b/gcc/config/riscv/riscv.opt @@ -523,6 +523,9 @@ Mask(XSFVCP) Var(riscv_sifive_subext) Mask(XSFCEASE) Var(riscv_sifive_subext) +TargetVariable +int riscv_fmv_priority = 0 + Enum Name(isa_spec_class) Type(enum riscv_isa_spec_class) Supported ISA specs (for use with the -misa-spec= option): -- 2.45.2
