"Yuta Mukai (Fujitsu)" <mukai.y...@fujitsu.com> writes:
> Hello,
>
> This patch adds initial support for FUJITSU-MONAKA CPU, which we are
> developing.
> This is the slides for the CPU:
> https://www.fujitsu.com/downloads/SUPER/topics/isc24/next-arm-based-processor-fujitsu-monaka-and-its-software-ecosystem.pdf
>
> Bootstrapped/regtested on aarch64-unknown-linux-gnu.
>
> We will post a patch for backporting to GCC 14 later.
>
> We would be grateful if someone could push this on our behalf, as we do not
> have write access.
Thanks for the patch, it looks good. I just have a couple of minor comments:
> @@ -132,6 +132,7 @@ AARCH64_CORE("octeontx2f95mm", octeontx2f95mm, cortexa57,
> V8_2A, (CRYPTO, PROFI
>
> /* Fujitsu ('F') cores. */
> AARCH64_CORE("a64fx", a64fx, a64fx, V8_2A, (F16, SVE), a64fx, 0x46, 0x001,
> -1)
> +AARCH64_CORE("fujitsu-monaka", fujitsu_monaka, cortexa57, V9_3A, (AES,
> CRYPTO, F16, F16FML, FP8, LS64, RCPC, RNG, SHA2, SHA3, SM4, SVE2_AES,
> SVE2_BITPERM, SVE2_SHA3, SVE2_SM4), fujitsu_monaka, 0x46, 0x003, -1)
Usually this file omits listing a feature if it is already implied by the
architecture level. In this case, I think V9_3A should enable F16FML and
RCPC automatically, and so we could drop those features from the list.
Also, we should be able to rely on transitive dependencies for the
SVE2 crypto extensions. So I think it should be enough to list:
AARCH64_CORE("fujitsu-monaka", fujitsu_monaka, cortexa57, V9_3A, (F16, FP8,
LS64, RNG, SVE2_AES, SVE2_BITPERM, SVE2_SHA3, SVE2_SM4), fujitsu_monaka, 0x46,
0x003, -1)
which should have the same effect.
Could you check whether that works?
> diff --git a/gcc/config/aarch64/tuning_models/fujitsu_monaka.h
> b/gcc/config/aarch64/tuning_models/fujitsu_monaka.h
> new file mode 100644
> index 000000000..8d6f297b8
> --- /dev/null
> +++ b/gcc/config/aarch64/tuning_models/fujitsu_monaka.h
> @@ -0,0 +1,65 @@
> +/* Tuning model description for AArch64 architecture.
It's probably worth changing "AArch64 architecture" to "FUJITSU-MONAKA".
The patch looks good to me otherwise.
Thanks,
Richard
