Force_operand issues an ICE when input is (subreg:DI (us_truncate:V8QI)), it's probably because it's an invalid rtx, So refine backend patterns for that.
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ready push to trunk. gcc/ChangeLog: PR target/117318 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_mask_store_1): Rename to .. (avx512vl_<code>v2div2qi2_mask_store_1): .. this. (avx512vl_<code>v2div2qi2_mask_store_2): Change to define_expand. (*avx512vl_<code><mode>v4qi2_mask_store_1): Rename to .. (avx512vl_<code><mode>v4qi2_mask_store_1): .. this. (avx512vl_<code><mode>v4qi2_mask_store_2): Change to define_expand. (*avx512vl_<code><mode>v8qi2_mask_store_1): Rename to .. (avx512vl_<code><mode>v8qi2_mask_store_1): .. this. (avx512vl_<code><mode>v8qi2_mask_store_2): Change to define_expand. (*avx512vl_<code><mode>v4hi2_mask_store_1): Rename to .. (avx512vl_<code><mode>v4hi2_mask_store_1): .. this. (avx512vl_<code><mode>v4hi2_mask_store_2): Change to define_expand. (*avx512vl_<code>v2div2hi2_mask_store_1): Rename to .. (avx512vl_<code>v2div2hi2_mask_store_1): .. this. (avx512vl_<code>v2div2hi2_mask_store_2): Change to define_expand. (*avx512vl_<code>v2div2si2_mask_store_1): Rename to .. (avx512vl_<code>v2div2si2_mask_store_1): .. this. (avx512vl_<code>v2div2si2_mask_store_2): Change to define_expand. (*avx512f_<code>v8div16qi2_mask_store_1): Rename to .. (avx512f_<code>v8div16qi2_mask_store_1): .. this. (avx512f_<code>v8div16qi2_mask_store_2): Change to define_expand. gcc/testsuite/ChangeLog: * gcc.target/i386/pr117318.c: New test. --- gcc/config/i386/sse.md | 268 +++++++++-------------- gcc/testsuite/gcc.target/i386/pr117318.c | 12 + 2 files changed, 110 insertions(+), 170 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr117318.c diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 2345015db1b..36f8567b66f 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -15439,7 +15439,7 @@ (define_insn "*avx512vl_<code>v2div2qi2_mask_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_<code>v2div2qi2_mask_store_1" +(define_insn "avx512vl_<code>v2div2qi2_mask_store_1" [(set (match_operand:V2QI 0 "memory_operand" "=m") (vec_merge:V2QI (any_truncate:V2QI @@ -15453,28 +15453,19 @@ (define_insn "*avx512vl_<code>v2div2qi2_mask_store_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_<code>v2div2qi2_mask_store_2" - [(set (match_operand:HI 0 "memory_operand") - (subreg:HI - (vec_merge:V2QI - (any_truncate:V2QI - (match_operand:V2DI 1 "register_operand")) - (vec_select:V2QI - (subreg:V4QI - (vec_concat:V2HI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V2QI - (any_truncate:V2QI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V2QImode, 0);") +(define_expand "avx512vl_<code>v2div2qi2_mask_store_2" + [(match_operand:HI 0 "memory_operand") + (any_truncate:V2QI + (match_operand:V2DI 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V2QImode, 0); + emit_insn (gen_avx512vl_<code>v2div2qi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_insn "*avx512vl_<code><mode>v4qi2_store_1" [(set (match_operand:V4QI 0 "memory_operand" "=m") @@ -15543,7 +15534,7 @@ (define_insn "*avx512vl_<code><mode>v4qi2_mask_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_<code><mode>v4qi2_mask_store_1" +(define_insn "avx512vl_<code><mode>v4qi2_mask_store_1" [(set (match_operand:V4QI 0 "memory_operand" "=m") (vec_merge:V4QI (any_truncate:V4QI @@ -15557,29 +15548,19 @@ (define_insn "*avx512vl_<code><mode>v4qi2_mask_store_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_<code><mode>v4qi2_mask_store_2" - [(set (match_operand:SI 0 "memory_operand") - (subreg:SI - (vec_merge:V4QI - (any_truncate:V4QI - (match_operand:VI4_128_8_256 1 "register_operand")) - (vec_select:V4QI - (subreg:V8QI - (vec_concat:V2SI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1) - (const_int 2) (const_int 3)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V4QI - (any_truncate:V4QI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V4QImode, 0);") +(define_expand "avx512vl_<code><mode>v4qi2_mask_store_2" + [(match_operand:SI 0 "memory_operand") + (any_truncate:V4QI + (match_operand:VI4_128_8_256 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V4QImode, 0); + emit_insn (gen_avx512vl_<code><mode>v4qi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_mode_iterator VI2_128_BW_4_256 [(V8HI "TARGET_AVX512BW") V8SI]) @@ -15651,7 +15632,7 @@ (define_insn "*avx512vl_<code><mode>v8qi2_mask_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_<code><mode>v8qi2_mask_store_1" +(define_insn "avx512vl_<code><mode>v8qi2_mask_store_1" [(set (match_operand:V8QI 0 "memory_operand" "=m") (vec_merge:V8QI (any_truncate:V8QI @@ -15665,31 +15646,19 @@ (define_insn "*avx512vl_<code><mode>v8qi2_mask_store_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_<code><mode>v8qi2_mask_store_2" - [(set (match_operand:DI 0 "memory_operand") - (subreg:DI - (vec_merge:V8QI - (any_truncate:V8QI - (match_operand:VI2_128_BW_4_256 1 "register_operand")) - (vec_select:V8QI - (subreg:V16QI - (vec_concat:V2DI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1) - (const_int 2) (const_int 3) - (const_int 4) (const_int 5) - (const_int 6) (const_int 7)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V8QI - (any_truncate:V8QI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V8QImode, 0);") +(define_expand "avx512vl_<code><mode>v8qi2_mask_store_2" + [(match_operand:DI 0 "memory_operand") + (any_truncate:V8QI + (match_operand:VI2_128_BW_4_256 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V8QImode, 0); + emit_insn (gen_avx512vl_<code><mode>v8qi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_mode_iterator PMOV_SRC_MODE_4 [(V4DI "TARGET_AVX2") V2DI V4SI]) (define_mode_attr pmov_dst_4 @@ -15817,7 +15786,7 @@ (define_insn "*avx512vl_<code><mode>v4hi2_mask_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_<code><mode>v4hi2_mask_store_1" +(define_insn "avx512vl_<code><mode>v4hi2_mask_store_1" [(set (match_operand:V4HI 0 "memory_operand" "=m") (vec_merge:V4HI (any_truncate:V4HI @@ -15835,30 +15804,19 @@ (define_insn "*avx512vl_<code><mode>v4hi2_mask_store_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_<code><mode>v4hi2_mask_store_2" - [(set (match_operand:DI 0 "memory_operand") - (subreg:DI - (vec_merge:V4HI - (any_truncate:V4HI - (match_operand:VI4_128_8_256 1 "register_operand")) - (vec_select:V4HI - (subreg:V8HI - (vec_concat:V2DI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1) - (const_int 2) (const_int 3)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V4HI - (any_truncate:V4HI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V4HImode, 0);") - +(define_expand "avx512vl_<code><mode>v4hi2_mask_store_2" + [(match_operand:DI 0 "memory_operand") + (any_truncate:V4HI + (match_operand:VI4_128_8_256 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V4HImode, 0); + emit_insn (gen_avx512vl_<code><mode>v4hi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_insn "*avx512vl_<code>v2div2hi2_store_1" [(set (match_operand:V2HI 0 "memory_operand" "=m") @@ -15919,7 +15877,7 @@ (define_insn "*avx512vl_<code>v2div2hi2_mask_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_<code>v2div2hi2_mask_store_1" +(define_insn "avx512vl_<code>v2div2hi2_mask_store_1" [(set (match_operand:V2HI 0 "memory_operand" "=m") (vec_merge:V2HI (any_truncate:V2HI @@ -15933,28 +15891,19 @@ (define_insn "*avx512vl_<code>v2div2hi2_mask_store_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_<code>v2div2hi2_mask_store_2" - [(set (match_operand:SI 0 "memory_operand") - (subreg:SI - (vec_merge:V2HI - (any_truncate:V2HI - (match_operand:V2DI 1 "register_operand")) - (vec_select:V2HI - (subreg:V4HI - (vec_concat:V2SI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V2HI - (any_truncate:V2HI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V2HImode, 0);") +(define_expand "avx512vl_<code>v2div2hi2_mask_store_2" + [(match_operand:SI 0 "memory_operand") + (any_truncate:V2HI + (match_operand:V2DI 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V2HImode, 0); + emit_insn (gen_avx512vl_<code>v2div2hi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_expand "truncv2div2si2" [(set (match_operand:V2SI 0 "register_operand") @@ -16074,7 +16023,7 @@ (define_insn "*avx512vl_<code>v2div2si2_mask_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512vl_<code>v2div2si2_mask_store_1" +(define_insn "avx512vl_<code>v2div2si2_mask_store_1" [(set (match_operand:V2SI 0 "memory_operand" "=m") (vec_merge:V2SI (any_truncate:V2SI @@ -16088,28 +16037,19 @@ (define_insn "*avx512vl_<code>v2div2si2_mask_store_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512vl_<code>v2div2si2_mask_store_2" - [(set (match_operand:DI 0 "memory_operand") - (subreg:DI - (vec_merge:V2SI - (any_truncate:V2SI - (match_operand:V2DI 1 "register_operand")) - (vec_select:V2SI - (subreg:V4SI - (vec_concat:V2DI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512VL && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V2SI - (any_truncate:V2SI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V2SImode, 0);") +(define_expand "avx512vl_<code>v2div2si2_mask_store_2" + [(match_operand:DI 0 "memory_operand") + (any_truncate:V2SI + (match_operand:V2DI 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512VL" +{ + operands[0] = adjust_address_nv (operands[0], V2SImode, 0); + emit_insn (gen_avx512vl_<code>v2div2si2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) (define_expand "truncv8div8qi2" [(set (match_operand:V8QI 0 "register_operand") @@ -16208,7 +16148,7 @@ (define_insn "*avx512f_<code>v8div16qi2_mask_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn "*avx512f_<code>v8div16qi2_mask_store_1" +(define_insn "avx512f_<code>v8div16qi2_mask_store_1" [(set (match_operand:V8QI 0 "memory_operand" "=m") (vec_merge:V8QI (any_truncate:V8QI @@ -16222,31 +16162,19 @@ (define_insn "*avx512f_<code>v8div16qi2_mask_store_1" (set_attr "prefix" "evex") (set_attr "mode" "TI")]) -(define_insn_and_split "avx512f_<code>v8div16qi2_mask_store_2" - [(set (match_operand:DI 0 "memory_operand") - (subreg:DI - (vec_merge:V8QI - (any_truncate:V8QI - (match_operand:V8DI 1 "register_operand")) - (vec_select:V8QI - (subreg:V16QI - (vec_concat:V2DI - (match_dup 0) - (const_int 0)) 0) - (parallel [(const_int 0) (const_int 1) - (const_int 2) (const_int 3) - (const_int 4) (const_int 5) - (const_int 6) (const_int 7)])) - (match_operand:QI 2 "register_operand")) 0))] - "TARGET_AVX512F && TARGET_EVEX512 && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (vec_merge:V8QI - (any_truncate:V8QI (match_dup 1)) - (match_dup 0) - (match_dup 2)))] - "operands[0] = adjust_address_nv (operands[0], V8QImode, 0);") +(define_expand "avx512f_<code>v8div16qi2_mask_store_2" + [(match_operand:DI 0 "memory_operand") + (any_truncate:V8QI + (match_operand:V8DI 1 "register_operand")) + (match_operand:QI 2 "register_operand")] + "TARGET_AVX512F && TARGET_EVEX512" +{ + operands[0] = adjust_address_nv (operands[0], V8QImode, 0); + emit_insn (gen_avx512f_<code>v8div16qi2_mask_store_1 (operands[0], + operands[1], + operands[2])); + DONE; +}) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; diff --git a/gcc/testsuite/gcc.target/i386/pr117318.c b/gcc/testsuite/gcc.target/i386/pr117318.c new file mode 100644 index 00000000000..3d316ad04cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr117318.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O" } */ + +typedef __attribute__((__vector_size__ (64))) long long V; +unsigned long long x; + +unsigned long long +foo() +{ + __builtin_ia32_pmovusqb512mem_mask (&x, (V){8000000000000000}, 255); + return x; +} -- 2.34.1