Re: [PATCH] testsuite: arm: Use check-function-bodies in fp16-aapcs-* tests

Richard Earnshaw (lists) Tue, 22 Oct 2024 04:37:09 -0700

On 20/10/2024 16:48, Torbjörn SVENSSON wrote:

Ok for trunk and releases/gcc-14?


--

Converted the tests to use check-function-bodies in order to ensure that
the sequence is correct.

gcc/testsuite/ChangeLog:

        * gcc.target/arm/fp16-aapcs-1.c: Use check-function-bodies.
        * gcc.target/arm/fp16-aapcs-2.c: Likewise.
        * gcc.target/arm/fp16-aapcs-3.c: Likewise.
        * gcc.target/arm/fp16-aapcs-4.c: Likewise.


OK.

R.


Signed-off-by: Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
---
  gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c | 53 ++++++++++++++++++--
  gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c | 33 ++++++++++---
  gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c | 54 ++++++++++++++++++---
  gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c | 33 ++++++++++---
  4 files changed, 150 insertions(+), 23 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c 
b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
index 0a0a60f3503..b18d7cda65c 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
@@ -3,20 +3,63 @@
  /* { dg-require-effective-target arm_fp16_ok } */
  /* { dg-options "-O2" }  */
  /* { dg-add-options arm_fp16_ieee } */
+/* { dg-final { check-function-bodies "**" "" "" } } */

/* Test __fp16 arguments and return value in registers (hard-float). */void

  swap (__fp16, __fp16);

+/*

+** F:
+** ...
+** (
+
+Below block is for non-armv8.1
+** (
+**     vmov\.f32       (s[3-9]|s1[0-5]), s0
+** ...
+**     vmov\.f32       s0, s1
+** ...
+**     vmov\.f32       s1, \1
+** |
+**     vmov\.f32       (s[3-9]|s1[0-5]), s1
+** ...
+**     vmov\.f32       s1, s0
+** ...
+**     vmov\.f32       s0, \2
+** )
+**     vstr\.32        s2, \[sp, #4\]  @ int
+**     bl      swap
+**     vldr\.32        s2, \[sp, #4\]  @ int
+**     vmov\.f32       s0, s2
+
+** |
+
+Below block is for armv8.1
+** (
+**     vmov    (s[3-9]|s1[0-5]), s0    @ __fp16
+** ...
+**     vmov    s0, s1  @ __fp16
+** ...
+**     vmov    s1, \3  @ __fp16
+** |
+**     vmov    (s[3-9]|s1[0-5]), s1    @ __fp16
+** ...
+**     vmov    s1, s0  @ __fp16
+** ...
+**     vmov    s0, \4  @ __fp16
+** )
+**     vstr\.32        s2, \[sp, #4\]  @ int
+**     bl      swap
+**     vldr\.16        s0, \[sp, #4\]
+
+** )
+** ...
+*/
  __fp16
  F (__fp16 a, __fp16 b, __fp16 c)
  {
    swap (b, a);
    return c;
  }
-
-/* { dg-final { scan-assembler {vmov\.f32\ts[0-9]+, s1} } }  */
-/* { dg-final { scan-assembler {vmov\.f32\ts1, s0} } }  */
-/* { dg-final { scan-assembler {vmov\.f32\ts[0-9]+, s2+} } }  */
-/* { dg-final { scan-assembler-times {vmov\.f32\ts0, s[0-9]+} 2 } }  */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c 
b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
index 12d20560f53..48510e89536 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
@@ -3,21 +3,42 @@
  /* { dg-options "-mfloat-abi=softfp -O2 -mno-long-calls" }  */
  /* { dg-add-options arm_fp16_ieee } */
  /* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } 
} */
+/* { dg-final { check-function-bodies "**" "" "" } } */

/* Test __fp16 arguments and return value in registers (softfp). */void

  swap (__fp16, __fp16);

+/*

+** F:
+** ...
+** (
+**     mov     r3, r0  @ __fp16
+** ...
+**     mov     r0, r1  @ __fp16
+** ...
+**     mov     r1, r3  @ __fp16
+** |
+**     mov     r3, r1  @ __fp16
+** ...
+**     mov     r1, r0  @ __fp16
+** ...
+**     mov     r0, r3  @ __fp16
+** )
+** ...
+*/
+/*
+** F: { target arm_little_endian }
+** ...
+**     str     r2, \[sp, #4\]
+**     bl      swap
+**     ldrh    r0, \[sp, #4\]  @ __fp16
+** ...
+*/
  __fp16
  F (__fp16 a, __fp16 b, __fp16 c)
  {
    swap (b, a);
    return c;
  }
-
-/* The swap must include two moves out of r0/r1 and two moves in.  */
-/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[01]} 2 } }  */
-/* { dg-final { scan-assembler-times {mov\tr[01], r[0-9]+} 2 } }  */
-/* c should be spilled around the call.  */
-/* { dg-final { scan-assembler {str\tr2, ([^\n]*).*ldrh\tr0, \1} { target 
arm_little_endian } } } */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c 
b/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
index 56a3ae26184..7238ef3a02e 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
@@ -3,21 +3,63 @@
  /* { dg-require-effective-target arm_fp16_alternative_ok } */
  /* { dg-options "-O2" }  */
  /* { dg-add-options arm_fp16_alternative } */
+/* { dg-final { check-function-bodies "**" "" "" } } */

/* Test __fp16 arguments and return value in registers (hard-float). */void

  swap (__fp16, __fp16);

+/*

+** F:
+** ...
+** (
+
+Below block is for non-armv8.1
+** (
+**     vmov\.f32       (s[3-9]|s1[0-5]), s0
+** ...
+**     vmov\.f32       s0, s1
+** ...
+**     vmov\.f32       s1, \1
+** |
+**     vmov\.f32       (s[3-9]|s1[0-5]), s1
+** ...
+**     vmov\.f32       s1, s0
+** ...
+**     vmov\.f32       s0, \2
+** )
+**     vstr\.32        s2, \[sp, #4\]  @ int
+**     bl      swap
+**     vldr\.32        s2, \[sp, #4\]  @ int
+**     vmov\.f32       s0, s2
+
+** |
+
+Below block is for armv8.1
+** (
+**     vmov    (s[3-9]|s1[0-5]), s0
+** ...
+**     vmov    s0, s1
+** ...
+**     vmov    s1, \3
+** |
+**     vmov    (s[3-9]|s1[0-5]), s1
+** ...
+**     vmov    s1, s0
+** ...
+**     vmov    s0, \4
+** )
+**     vstr\.32        s2, \[sp, #4\]  @ int
+**     bl      swap
+**     vldr\.16        s0, \[sp, #4\]
+
+** )
+** ...
+*/
  __fp16
  F (__fp16 a, __fp16 b, __fp16 c)
  {
    swap (b, a);
    return c;
  }
-
-/* { dg-final { scan-assembler {vmov\.f32\ts[0-9]+, s1} } }  */
-/* { dg-final { scan-assembler {vmov\.f32\ts1, s0} } }  */
-/* { dg-final { scan-assembler {vmov\.f32\ts[0-9]+, s2+} } }  */
-/* { dg-final { scan-assembler-times {vmov\.f32\ts0, s[0-9]+} 2 } }  */
-
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c 
b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
index 09fa64aa494..13f08d8afa3 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
@@ -3,21 +3,42 @@
  /* { dg-options "-mfloat-abi=softfp -O2" }  */
  /* { dg-add-options arm_fp16_alternative } */
  /* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } 
} */
+/* { dg-final { check-function-bodies "**" "" "" } } */

/* Test __fp16 arguments and return value in registers (softfp). */void

  swap (__fp16, __fp16);

+/*

+** F:
+** ...
+** (
+**     mov     r3, r0  @ __fp16
+** ...
+**     mov     r0, r1  @ __fp16
+** ...
+**     mov     r1, r3  @ __fp16
+** |
+**     mov     r3, r1  @ __fp16
+** ...
+**     mov     r1, r0  @ __fp16
+** ...
+**     mov     r0, r3  @ __fp16
+** )
+** ...
+*/
+/*
+** F: { target arm_little_endian }
+** ...
+**     str     r2, \[sp, #4\]
+**     bl      swap
+**     ldrh    r0, \[sp, #4\]  @ __fp16
+** ...
+*/
  __fp16
  F (__fp16 a, __fp16 b, __fp16 c)
  {
    swap (b, a);
    return c;
  }
-
-/* The swap must include two moves out of r0/r1 and two moves in.  */
-/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[01]} 2 } }  */
-/* { dg-final { scan-assembler-times {mov\tr[01], r[0-9]+} 2 } }  */
-/* c should be spilled around the call.  */
-/* { dg-final { scan-assembler {str\tr2, ([^\n]*).*ldrh\tr0, \1} { target 
arm_little_endian } } } */

Re: [PATCH] testsuite: arm: Use check-function-bodies in fp16-aapcs-* tests

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