Hi,
> On 17 Oct 2024, at 12:38 PM, Kyrylo Tkachov <ktkac...@nvidia.com> wrote:
>
> Hi Soumya
>
>> On 17 Oct 2024, at 06:10, Soumya AR <soum...@nvidia.com> wrote:
>>
>> Hi Richard,
>>
>> Thanks for the feedback. I’ve updated the patch with the suggested change.
>> Ok for mainline?
>>
>> Best,
>> Soumya
>>
>>> On 14 Oct 2024, at 6:40 PM, Richard Sandiford <richard.sandif...@arm.com>
>>> wrote:
>>>
>>> External email: Use caution opening links or attachments
>>>
>>>
>>> Soumya AR <soum...@nvidia.com> writes:
>>>> This patch implements constant folding for svlsl. Test cases have been
>>>> added to
>>>> check for the following cases:
>>>>
>>>> Zero, merge, and don't care predication.
>>>> Shift by 0.
>>>> Shift by register width.
>>>> Overflow shift on signed and unsigned integers.
>>>> Shift on a negative integer.
>>>> Maximum possible shift, eg. shift by 7 on an 8-bit integer.
>>>>
>>>> The patch was bootstrapped and regtested on aarch64-linux-gnu, no
>>>> regression.
>>>> OK for mainline?
>>>>
>>>> Signed-off-by: Soumya AR <soum...@nvidia.com>
>>>>
>>>> gcc/ChangeLog:
>>>>
>>>> * config/aarch64/aarch64-sve-builtins-base.cc (svlsl_impl::fold):
>>>> Try constant folding.
>>>>
>>>> gcc/testsuite/ChangeLog:
>>>>
>>>> * gcc.target/aarch64/sve/const_fold_lsl_1.c: New test.
>>>>
>>>> From 0cf5223e51623dcdbc47a06cbd17d927c74094e2 Mon Sep 17 00:00:00 2001
>>>> From: Soumya AR <soum...@nvidia.com>
>>>> Date: Tue, 24 Sep 2024 09:09:32 +0530
>>>> Subject: [PATCH] SVE intrinsics: Fold constant operands for svlsl.
>>>>
>>>> This patch implements constant folding for svlsl. Test cases have been
>>>> added to
>>>> check for the following cases:
>>>>
>>>> Zero, merge, and don't care predication.
>>>> Shift by 0.
>>>> Shift by register width.
>>>> Overflow shift on signed and unsigned integers.
>>>> Shift on a negative integer.
>>>> Maximum possible shift, eg. shift by 7 on an 8-bit integer.
>>>>
>>>> The patch was bootstrapped and regtested on aarch64-linux-gnu, no
>>>> regression.
>>>> OK for mainline?
>>>>
>>>> Signed-off-by: Soumya AR <soum...@nvidia.com>
>>>>
>>>> gcc/ChangeLog:
>>>>
>>>> * config/aarch64/aarch64-sve-builtins-base.cc (svlsl_impl::fold):
>>>> Try constant folding.
>>>>
>>>> gcc/testsuite/ChangeLog:
>>>>
>>>> * gcc.target/aarch64/sve/const_fold_lsl_1.c: New test.
>>>> ---
>>>> .../aarch64/aarch64-sve-builtins-base.cc | 15 +-
>>>> .../gcc.target/aarch64/sve/const_fold_lsl_1.c | 133 ++++++++++++++++++
>>>> 2 files changed, 147 insertions(+), 1 deletion(-)
>>>> create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/const_fold_lsl_1.c
>>>>
>>>> diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
>>>> b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
>>>> index afce52a7e8d..be5d6eae525 100644
>>>> --- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc
>>>> +++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc
>>>> @@ -1893,6 +1893,19 @@ public:
>>>> }
>>>> };
>>>>
>>>> +class svlsl_impl : public rtx_code_function
>>>> +{
>>>> +public:
>>>> + CONSTEXPR svlsl_impl ()
>>>> + : rtx_code_function (ASHIFT, ASHIFT) {}
>>>> +
>>>> + gimple *
>>>> + fold (gimple_folder &f) const override
>>>> + {
>>>> + return f.fold_const_binary (LSHIFT_EXPR);
>>>> + }
>>>> +};
>>>> +
>>>
>>> Sorry for the slow review. I think we should also make aarch64_const_binop
>>> return 0 for LSHIFT_EXPR when the shift is out of range, to match the
>>> behaviour of the underlying instruction.
>>>
>>> It looks good otherwise.
>>>
>>> Thanks,
>>> Richard
>>>
>>
>
> In the test case:
> +/*
> +** s64_x_bit_width:
> +** mov z[0-9]+\.b, #0
> +** ret
> +*/
> +svint64_t s64_x_bit_width (svbool_t pg) {
> + return svlsl_n_s64_x (pg, svdup_s64 (5), 64);
> +}
> +
> +/*
> +** s64_x_out_of_range:
> +** mov z[0-9]+\.b, #0
> +** ret
> +*/
>
> You’ll need to adjust the scan for register zeroing according to the upcoming
> changes from Tamar as per:
> https://gcc.gnu.org/pipermail/gcc-patches/2024-October/665669.html
>
> The patch LGTM (but Richard should approve as it’s SVE-specific)
>Adjusted this patch according to Tamar’s changes. Ok for mainline? Thanks, Soumya > Thanks, > Kyrill
0001-SVE-intrinsics-Fold-constant-operands-for-svlsl.patch
Description: 0001-SVE-intrinsics-Fold-constant-operands-for-svlsl.patch
