I have now attached a proper version of my patch, which is relative to your
patch.
OK once your patch is in?
* * *
This adds -march=gfx10-3-generic and -march=gfx11-generic support to the
compiler,
permitting in principle to compile one binary for all gfx103x and gfx11xx GPUs,
respectively.
See https://llvm.org/docs/AMDGPUUsage.html#generic-processor-versioning for the
generic format - and, by scrolling up a few lines, the gfx*-generic description.
* * *
CAVEATS:
* For offloading, it needs changes to the libgomp plugin, which has not been
done.
* While compiling + linking has been checked, ROCm 6.0.2 is definitely too old
for
it. I have not tried whether a newer ROCm already supports it. (Latest is
6.2.2)
* This features requires the rather new llvm-mc for assembly and lld for
linking;
namely the ones of LLVM 19.
Otherwise, it should just work on the compiler side (always), but in order to be
a bit more usable than producing .s files, also libraries need to be compiled
for
it, e.g. by specifying the new march with --with-multilib-list=.
Thanks,
Tobias
PS: gfx-9-generic also exists, but requires some more work/thoughts as gfx9xx
are
all a bit different (see GCC's .def file but also LLVM's documention (link above
plus scroll up about 30 lines)).
PPS: Once in and tested, we also want to add some proper documentation for it;
but
we might want to wait until libgomp support is also in.
GCN: Initial generic-target handling
Newer llvm-mc assemblers support the gfx*-generic targets, permitting to
generate code for all GPUs belonging to the same generation, even if not
optimal code. This requires LLVM 19.
This patch adds the compiler-side support for generic gfx and also
adds -march=gfx10-3-generic and -march=gfx-11. However, those -march= are
not documented nor used anywhere, yet.
Disclaimer: Not tested (as my ROCm does not support it); additionally,
libgomp/plugin/plugin-gcn.c has to be updated before it becomes useful.
gcc/ChangeLog:
* config/gcn/gcn-devices.def: Add generic version/flag as first
value; update; add gfx-10-3-generic and gfx11-generic.
* config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): Remove
(ASM_SPEC): Use generated ABI_VERSION_OPT instead.
* config/gcn/gcn-tables.opt: Regenerate
* config/gcn/gcn.h (gcn_device_def): Add unsigned gen_var member.
* config/gcn/gcn-opts.h (processor_type): Update GCN_DEVICE
for new first value.
* config/gcn/gcn.cc (gcn_devices): Likewise.
* config/gcn/gen-opt-tables.awk: Likewise.
* config/gcn/gen-gcn-device-macros.awk: Likewise; use ELF name
for the macro name; generate ABI_VERSION_OPT.
* config/gcn/mkoffload.cc (ELFABIVERSION_AMDGPU_HSA_V6,
EF_AMDGPU_GENERIC_VERSION_V, EF_AMDGPU_GENERIC_VERSION_OFFSET,
GET_GENERIC_VERSION, SET_GENERIC_VERSION): Define
(elf_arch_code): Update GCN_DEVICE for new first argument.
(get_arch): Call SET_GENERIC_VERSION flag on elf_flags.
(copy_early_debug_info): If the arch sets the generic version,
use ELFABIVERSION_AMDGPU_HSA_V6.
libgomp/ChangeLog:
* plugin/plugin-gcn.c (GCN_DEVICE): Update for shifted order
due to new generic version/flag in gcn-devices.def.
gcc/config/gcn/gcn-devices.def | 60 ++++++++++++++++++++++----------
gcc/config/gcn/gcn-hsa.h | 9 +----
gcc/config/gcn/gcn-opts.h | 2 +-
gcc/config/gcn/gcn-tables.opt | 6 ++++
gcc/config/gcn/gcn.cc | 4 +--
gcc/config/gcn/gcn.h | 1 +
gcc/config/gcn/gen-gcn-device-macros.awk | 37 ++++++++++++++------
gcc/config/gcn/gen-opt-tables.awk | 2 +-
gcc/config/gcn/mkoffload.cc | 32 ++++++++++++++---
libgomp/plugin/plugin-gcn.c | 8 ++---
10 files changed, 111 insertions(+), 50 deletions(-)
diff --git a/gcc/config/gcn/gcn-devices.def b/gcc/config/gcn/gcn-devices.def
index f2dbe18b6ae..b6e7ebecaa3 100644
--- a/gcc/config/gcn/gcn-devices.def
+++ b/gcc/config/gcn/gcn-devices.def
@@ -34,30 +34,32 @@
directly.
GCN_DEVICE field descriptions:
- 0 "name" (text, external)
+ 0 Generic flag/version (0 = non-generic, 1 to 255 = generic version,
+ external)
+ 1 "name" (text, external)
Lower case device name used in -march=name, diagnostics,
assembler directives, etc.
- 1 "NAME" (text, external)
+ 2 "NAME" (text, external)
Upper case device name used in macros.
- 2 "ELF" (hex integer, external)
+ 3 "ELF" (hex integer, external)
Magic number used assigned to this device for use in elf_flags.
- 3 "ISA" (enum gcn_isa, internal)
+ 4 "ISA" (enum gcn_isa, internal)
ISA variant for instruction selection, etc.
- 4 "XNACK default" (enum hsaco_attr_type, internal)
+ 5 "XNACK default" (enum hsaco_attr_type, internal)
Default value for the -mattr=[-+]xnack setting. May need to correspond
to the assembler expectations for this device.
- 5 "SRAM_ECC default" (enum hsaco_attr_type, internal)
+ 6 "SRAM_ECC default" (enum hsaco_attr_type, internal)
Default value for the -mattr=[-+]sram-ecc setting. Only really used
to ensure that the binary is in a known state mkoffload can match.
- 6 "WAVE64 mode" (enum hsaco_attr_type, internal)
+ 7 "WAVE64 mode" (enum hsaco_attr_type, internal)
Set "on" for devices where this needs to be configured, "unsupported"
otherwise (meaning no special treatment needed). GCC does not support
wave32 mode.
- 7 "CU mode" (enum hsaco_attr_type, internal)
+ 8 "CU mode" (enum hsaco_attr_type, internal)
Set "on" for devices that have this feature, "unsupported" otherwise
(meaning that CU mode is not optional on the device). GCC does not
support CU mode off.
- 8 "Max ISA VGPRs" (integer, internal)
+ 9 "Max ISA VGPRs" (integer, internal)
Define how many registers there are in the VGPR register file, for the
purposes of calculating maximum occupancy. Some devices have AVGPRs
in the same register file, some have more registers than are
@@ -68,7 +70,9 @@
"internal" are defined and used only in GCC (although some may have
user-visible effects) and may be refactored as needed. */
-GCN_DEVICE(gfx900, GFX900, 0x2c, ISA_GCN5,
+/* GCN GFX9 (Vega) */
+
+GCN_DEVICE(0, gfx900, GFX900, 0x2c, ISA_GCN5,
/* XNACK default */ HSACO_ATTR_OFF,
/* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
/* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
@@ -76,7 +80,7 @@ GCN_DEVICE(gfx900, GFX900, 0x2c, ISA_GCN5,
/* Max ISA VGPRs */ 256
)
-GCN_DEVICE(gfx906, GFX906, 0x2f, ISA_GCN5,
+GCN_DEVICE(0, gfx906, GFX906, 0x2f, ISA_GCN5,
/* XNACK default */ HSACO_ATTR_OFF,
/* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
/* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
@@ -84,7 +88,7 @@ GCN_DEVICE(gfx906, GFX906, 0x2f, ISA_GCN5,
/* Max ISA VGPRs */ 256
)
-GCN_DEVICE(gfx908, GFX908, 0x30, ISA_CDNA1,
+GCN_DEVICE(0, gfx908, GFX908, 0x30, ISA_CDNA1,
/* XNACK default */ HSACO_ATTR_OFF,
/* SRAM_ECC default */ HSACO_ATTR_ANY,
/* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
@@ -92,7 +96,7 @@ GCN_DEVICE(gfx908, GFX908, 0x30, ISA_CDNA1,
/* Max ISA VGPRs */ 256
)
-GCN_DEVICE(gfx90a, GFX90A, 0x3f, ISA_CDNA2,
+GCN_DEVICE(0, gfx90a, GFX90A, 0x3f, ISA_CDNA2,
/* XNACK default */ HSACO_ATTR_ANY,
/* SRAM_ECC default */ HSACO_ATTR_ANY,
/* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
@@ -100,7 +104,7 @@ GCN_DEVICE(gfx90a, GFX90A, 0x3f, ISA_CDNA2,
/* Max ISA VGPRs */ 512
)
-GCN_DEVICE(gfx90c, GFX90C, 0x32, ISA_GCN5,
+GCN_DEVICE(0, gfx90c, GFX90C, 0x32, ISA_GCN5,
/* XNACK default */ HSACO_ATTR_ANY,
/* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
/* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
@@ -108,7 +112,9 @@ GCN_DEVICE(gfx90c, GFX90C, 0x32, ISA_GCN5,
/* Max ISA VGPRs */ 256
)
-GCN_DEVICE(gfx1030, GFX1030, 0x36, ISA_RDNA2,
+/* GCN GFX10.3 (RDNA 2) */
+
+GCN_DEVICE(0, gfx1030, GFX1030, 0x36, ISA_RDNA2,
/* XNACK default */ HSACO_ATTR_UNSUPPORTED,
/* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
/* WAVE64 mode */ HSACO_ATTR_ON,
@@ -116,7 +122,7 @@ GCN_DEVICE(gfx1030, GFX1030, 0x36, ISA_RDNA2,
/* Max ISA VGPRs */ 512 /* 512 SIMD32 = 256 wavefrontsize64. */
)
-GCN_DEVICE(gfx1036, GFX1036, 0x45, ISA_RDNA2,
+GCN_DEVICE(0, gfx1036, GFX1036, 0x45, ISA_RDNA2,
/* XNACK default */ HSACO_ATTR_UNSUPPORTED,
/* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
/* WAVE64 mode */ HSACO_ATTR_ON,
@@ -124,7 +130,17 @@ GCN_DEVICE(gfx1036, GFX1036, 0x45, ISA_RDNA2,
/* Max ISA VGPRs */ 512 /* 512 SIMD32 = 256 wavefrontsize64. */
)
-GCN_DEVICE(gfx1100, GFX1100, 0x41, ISA_RDNA3,
+GCN_DEVICE(1, gfx10-3-generic, GFX10_3_GENERIC, 0x053, ISA_RDNA2,
+ /* XNACK default */ HSACO_ATTR_UNSUPPORTED,
+ /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
+ /* WAVE64 mode */ HSACO_ATTR_ON,
+ /* CU mode */ HSACO_ATTR_ON,
+ /* Max ISA VGPRs */ 512 /* 512 SIMD32 = 256 wavefrontsize64. */
+ )
+
+/* GCN GFX11 (RDNA 3) */
+
+GCN_DEVICE(0, gfx1100, GFX1100, 0x41, ISA_RDNA3,
/* XNACK default */ HSACO_ATTR_UNSUPPORTED,
/* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
/* WAVE64 mode */ HSACO_ATTR_ON,
@@ -132,7 +148,15 @@ GCN_DEVICE(gfx1100, GFX1100, 0x41, ISA_RDNA3,
/* Max ISA VGPRs */ 1536 /* 1536 SIMD32 = 768 wavefrontsize64. */
)
-GCN_DEVICE(gfx1103, GFX1103, 0x44, ISA_RDNA3,
+GCN_DEVICE(0, gfx1103, GFX1103, 0x44, ISA_RDNA3,
+ /* XNACK default */ HSACO_ATTR_UNSUPPORTED,
+ /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
+ /* WAVE64 mode */ HSACO_ATTR_ON,
+ /* CU mode */ HSACO_ATTR_ON,
+ /* Max ISA VGPRs */ 1536
+ )
+
+GCN_DEVICE(1, gfx11-generic, GFX11_GENERIC, 0x054, ISA_RDNA3,
/* XNACK default */ HSACO_ATTR_UNSUPPORTED,
/* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
/* WAVE64 mode */ HSACO_ATTR_ON,
diff --git a/gcc/config/gcn/gcn-hsa.h b/gcc/config/gcn/gcn-hsa.h
index 7665e4f3158..d87d2fa143f 100644
--- a/gcc/config/gcn/gcn-hsa.h
+++ b/gcc/config/gcn/gcn-hsa.h
@@ -75,19 +75,12 @@ extern unsigned int gcn_local_sym_hash (const char *name);
supported for gcn. */
#define GOMP_SELF_SPECS ""
-/* Explicitly set the ABI version; in principle, we could use just the
- default; however, when debugging symbols are turned on, mkoffload.cc
- writes a new AMD GPU object file and the ABI version needs to be the
- same. - LLVM <= 17 defaults to 4 while LLVM >= 18 defaults to 5.
- GCC supports LLVM >= 13.0.1 and only LLVM >= 14 supports version 5. */
-#define ABI_VERSION_SPEC "--amdhsa-code-object-version=4"
-
#include "gcn-device-macros.h"
/* Use LLVM assembler and linker options. */
#define ASM_SPEC "-triple=amdgcn--amdhsa " \
"%{march=*:-mcpu=%*} " \
- ABI_VERSION_SPEC " " \
+ ABI_VERSION_OPT \
XNACKOPT \
SRAMOPT \
WAVE64OPT \
diff --git a/gcc/config/gcn/gcn-opts.h b/gcc/config/gcn/gcn-opts.h
index 0026becdedc..8447660e89f 100644
--- a/gcc/config/gcn/gcn-opts.h
+++ b/gcc/config/gcn/gcn-opts.h
@@ -20,7 +20,7 @@
/* Create constants for PROCESSOR_GFX???. */
enum processor_type
{
-#define GCN_DEVICE(name, NAME, ...) \
+#define GCN_DEVICE(gen_ver, name, NAME, ...) \
PROCESSOR_ ## NAME,
#include "gcn-devices.def"
PROCESSOR_COUNT
diff --git a/gcc/config/gcn/gcn-tables.opt b/gcc/config/gcn/gcn-tables.opt
index 140316f7250..bb71089ff66 100644
--- a/gcc/config/gcn/gcn-tables.opt
+++ b/gcc/config/gcn/gcn-tables.opt
@@ -45,8 +45,14 @@ Enum(gpu_type) String(gfx1030) Value(PROCESSOR_GFX1030)
EnumValue
Enum(gpu_type) String(gfx1036) Value(PROCESSOR_GFX1036)
+EnumValue
+Enum(gpu_type) String(gfx10-3-generic) Value(PROCESSOR_GFX10_3_GENERIC)
+
EnumValue
Enum(gpu_type) String(gfx1100) Value(PROCESSOR_GFX1100)
EnumValue
Enum(gpu_type) String(gfx1103) Value(PROCESSOR_GFX1103)
+
+EnumValue
+Enum(gpu_type) String(gfx11-generic) Value(PROCESSOR_GFX11_GENERIC)
diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index 3dc6acfa950..fa14f0c54f8 100644
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -101,8 +101,8 @@ static hash_map<tree, int> lds_allocs;
/* Import all the data from gcn-devices.def.
The PROCESSOR_GFXnnn should be indices for this table. */
const struct gcn_device_def gcn_devices[] = {
-#define GCN_DEVICE(name, NAME, ELF, ISA, XNACK, SRAMECC, WAVE64, CU, VGPRS) \
- {PROCESSOR_ ## NAME, #name, #NAME, ISA, XNACK, SRAMECC, WAVE64, CU, VGPRS},
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ISA, XNACK, SRAMECC, WAVE64, CU, VGPRS) \
+ {gen_ver, PROCESSOR_ ## NAME, #name, #NAME, ISA, XNACK, SRAMECC, WAVE64, CU, VGPRS},
#include "gcn-devices.def"
};
diff --git a/gcc/config/gcn/gcn.h b/gcc/config/gcn/gcn.h
index ff508406ff1..1855b03db14 100644
--- a/gcc/config/gcn/gcn.h
+++ b/gcc/config/gcn/gcn.h
@@ -17,6 +17,7 @@
#include "config/gcn/gcn-opts.h"
extern const struct gcn_device_def {
+ unsigned gen_ver;
enum processor_type id;
const char *name;
const char *NAME;
diff --git a/gcc/config/gcn/gen-gcn-device-macros.awk b/gcc/config/gcn/gen-gcn-device-macros.awk
index 6352fa5fa3e..7cb705770d2 100644
--- a/gcc/config/gcn/gen-gcn-device-macros.awk
+++ b/gcc/config/gcn/gen-gcn-device-macros.awk
@@ -25,28 +25,35 @@ BEGIN {
print " Do not edit. */"
list=""
+ generic_list=""
}
/^GCN_DEVICE\(/ {
- gfx=$2
- list=(list " OPT_" gfx)
+ gen_ver=$2
+ gfx=$3
+ elf=$4
+ list=(list " OPT_" elf)
print ""
+ if (gen_ver > 0) {
+ generic_list=(generic_list " OPT_" elf)
+ printf "\n#define GENERIC_%s \"march=%s:--amdhsa-code-object-version=6;\"", elf, gfx
+ }
next
}
/XNACK default.*HSACO_ATTR_UNSUPPORTED/ {
- printf "\n#define XNACK_%s \"march=%s:;\"", gfx, gfx
+ printf "\n#define XNACK_%s \"march=%s:;\"", elf, gfx
next
}
/XNACK default.*HSACO_ATTR_OFF/ {
- printf "\n#define XNACK_%s \"march=%s:%{!mxnack*|mxnack=default|mxnack=off:-mattr=-xnack;mxnack=on:-mattr=+xnack};\"", gfx, gfx
+ printf "\n#define XNACK_%s \"march=%s:%{!mxnack*|mxnack=default|mxnack=off:-mattr=-xnack;mxnack=on:-mattr=+xnack};\"", elf, gfx
next
}
/XNACK default.*HSACO_ATTR_ANY/ {
- printf "\n#define XNACK_%s \"march=%s:%{mxnack=off:-mattr=-xnack;mxnack=on:-mattr=+xnack};\"", gfx, gfx
+ printf "\n#define XNACK_%s \"march=%s:%{mxnack=off:-mattr=-xnack;mxnack=on:-mattr=+xnack};\"", elf, gfx
next
}
@@ -56,12 +63,12 @@ BEGIN {
}
/SRAM_ECC default.*HSACO_ATTR_UNSUPPORTED/ {
- printf "\n#define SRAM_%s \"march=%s:;\"", gfx, gfx
+ printf "\n#define SRAM_%s \"march=%s:;\"", elf, gfx
next
}
/SRAM_ECC default.*HSACO_ATTR_ANY/ {
- printf "\n#define SRAM_%s \"march=%s:%{msram-ecc=on:-mattr=+sramecc;msram-ecc=off:-mattr=-sramecc};\"", gfx, gfx
+ printf "\n#define SRAM_%s \"march=%s:%{msram-ecc=on:-mattr=+sramecc;msram-ecc=off:-mattr=-sramecc};\"", elf, gfx
next
}
@@ -71,12 +78,12 @@ BEGIN {
}
/WAVE64 mode.*HSACO_ATTR_UNSUPPORTED/ {
- printf "\n#define WAVE64_%s \"march=%s:;\"", gfx, gfx
+ printf "\n#define WAVE64_%s \"march=%s:;\"", elf, gfx
next
}
/WAVE64 mode.*HSACO_ATTR_ON/ {
- printf "\n#define WAVE64_%s \"march=%s:-mattr=+wavefrontsize64;\"", gfx, gfx
+ printf "\n#define WAVE64_%s \"march=%s:-mattr=+wavefrontsize64;\"", elf, gfx
next
}
@@ -86,12 +93,12 @@ BEGIN {
}
/CU mode.*HSACO_ATTR_UNSUPPORTED/ {
- printf "\n#define CU_%s \"march=%s:;\"", gfx, gfx
+ printf "\n#define CU_%s \"march=%s:;\"", elf, gfx
next
}
/CU mode.*HSACO_ATTR_ON/ {
- printf "\n#define CU_%s \"march=%s:-mattr=+cumode;\"", gfx, gfx
+ printf "\n#define CU_%s \"march=%s:-mattr=+cumode;\"", elf, gfx
next
}
@@ -100,9 +107,17 @@ BEGIN {
exit 1
}
+# ABI Version: In principle, the LLVM default would work. However,
+# however, when debugging symbols are turned on, mkoffload.cc
+# writes a new AMD GPU object file and the ABI version needs to be the
+# same. - LLVM <= 17 defaults to 4 while LLVM >= 18 defaults to 5.
+# GCC supports LLVM >= 13.0.1 and only LLVM >= 14 supports version 5.
+# Code object V6 is supported since LLVM 19.
+
END {
print ""
print ""
+ printf "#define ABI_VERSION_OPT \"%%{\"%s \"!march=*|march=*:--amdhsa-code-object-version=4} \"\n", gensub (/OPT/, "GENERIC", "g", generic_list)
printf "#define XNACKOPT \"%%{\"%s \":%%eexpected march\\n} \"\n", gensub (/OPT/, "XNACK", "g", list)
printf "#define SRAMOPT \"%%{\"%s \":%%eexpected march\\n} \"\n", gensub (/OPT/, "SRAM", "g", list)
printf "#define WAVE64OPT \"%%{\"%s \":%%eexpected march\\n} \"\n", gensub (/OPT/, "WAVE64", "g", list)
diff --git a/gcc/config/gcn/gen-opt-tables.awk b/gcc/config/gcn/gen-opt-tables.awk
index 9fbe4cfe81f..0a1131351b6 100644
--- a/gcc/config/gcn/gen-opt-tables.awk
+++ b/gcc/config/gcn/gen-opt-tables.awk
@@ -51,5 +51,5 @@ BEGIN {
/^GCN_DEVICE\(/ {
print ""
print "EnumValue"
- print "Enum(gpu_type) String(" $2 ") Value(PROCESSOR_" $3 ")"
+ print "Enum(gpu_type) String(" $3 ") Value(PROCESSOR_" $4 ")"
}
diff --git a/gcc/config/gcn/mkoffload.cc b/gcc/config/gcn/mkoffload.cc
index cebb9e506fb..5e5dadf6974 100644
--- a/gcc/config/gcn/mkoffload.cc
+++ b/gcc/config/gcn/mkoffload.cc
@@ -48,10 +48,12 @@
#define ELFABIVERSION_AMDGPU_HSA_V3 1
#undef ELFABIVERSION_AMDGPU_HSA_V4
#define ELFABIVERSION_AMDGPU_HSA_V4 2
+#undef ELFABIVERSION_AMDGPU_HSA_V6
+#define ELFABIVERSION_AMDGPU_HSA_V6 4
/* Extract the EF_AMDGPU_MACH_AMDGCN_GFXnnn from the def file. */
enum elf_arch_code {
-#define GCN_DEVICE(name, NAME, ELF_ARCH, ...) \
+#define GCN_DEVICE(gen_ver, name, NAME, ELF_ARCH, ...) \
EF_AMDGPU_MACH_AMDGCN_ ## NAME = ELF_ARCH,
#include "gcn-devices.def"
#undef GCN_DEVICE
@@ -69,6 +71,9 @@ enum elf_arch_code {
#define EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 0x800
#define EF_AMDGPU_FEATURE_SRAMECC_ON_V4 0xc00
+#define EF_AMDGPU_GENERIC_VERSION_V 0xff000000 /* Mask. */
+#define EF_AMDGPU_GENERIC_VERSION_OFFSET 24
+
#define SET_XNACK_ON(VAR) VAR = ((VAR & ~EF_AMDGPU_FEATURE_XNACK_V4) \
| EF_AMDGPU_FEATURE_XNACK_ON_V4)
#define SET_XNACK_ANY(VAR) VAR = ((VAR & ~EF_AMDGPU_FEATURE_XNACK_V4) \
@@ -100,6 +105,12 @@ enum elf_arch_code {
== EF_AMDGPU_FEATURE_SRAMECC_ON_V4)
#define TEST_SRAM_ECC_UNSET(VAR) ((VAR & EF_AMDGPU_FEATURE_SRAMECC_V4) == 0)
+#define GET_GENERIC_VERSION(VAR) ((VAR & EF_AMDGPU_GENERIC_VERSION_V) \
+ >> EF_AMDGPU_GENERIC_VERSION_OFFSET)
+#define SET_GENERIC_VERSION(VAR,GEN_VER) \
+ VAR = ((VAR & ~EF_AMDGPU_GENERIC_VERSION_V) \
+ | (GEN_VER << EF_AMDGPU_GENERIC_VERSION_OFFSET))
+
#ifndef R_AMDGPU_NONE
#define R_AMDGPU_NONE 0
#define R_AMDGPU_ABS32_LO 1 /* (S + A) & 0xFFFFFFFF */
@@ -305,7 +316,9 @@ copy_early_debug_info (const char *infile, const char *outfile)
/* Patch the correct elf architecture flag into the file. */
ehdr.e_ident[7] = ELFOSABI_AMDGPU_HSA;
- ehdr.e_ident[8] = ELFABIVERSION_AMDGPU_HSA_V4;
+ ehdr.e_ident[8] = (GET_GENERIC_VERSION (elf_flags)
+ ? ELFABIVERSION_AMDGPU_HSA_V6
+ : ELFABIVERSION_AMDGPU_HSA_V4);
ehdr.e_type = ET_REL;
ehdr.e_machine = EM_AMDGPU;
ehdr.e_flags = elf_arch | elf_flags;
@@ -788,7 +801,7 @@ get_arch (const char *str, const char *with_arch_str)
{
/* Use the def file to map the name to the elf_arch_code. */
if (!str) ;
-#define GCN_DEVICE(name, NAME, ELF, ...) \
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ...) \
else if (strcmp (str, #name) == 0) \
return ELF;
#include "gcn-devices.def"
@@ -1005,7 +1018,7 @@ main (int argc, char **argv)
/* Set the default ELF flags for XNACK. */
switch (elf_arch)
{
-#define GCN_DEVICE(name, NAME, ELF, ISA, XNACK, SRAM, ...) \
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ISA, XNACK, SRAM, ...) \
case ELF: XNACK; break;
#define HSACO_ATTR_UNSUPPORTED SET_XNACK_UNSET (elf_flags)
#define HSACO_ATTR_OFF SET_XNACK_OFF (elf_flags)
@@ -1022,7 +1035,7 @@ main (int argc, char **argv)
/* Set the default ELF flags for SRAM_ECC. */
switch (elf_arch)
{
-#define GCN_DEVICE(name, NAME, ELF, ISA, XNACK, SRAM, ...) \
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ISA, XNACK, SRAM, ...) \
case ELF: SRAM; break;
#define HSACO_ATTR_UNSUPPORTED SET_SRAM_ECC_UNSET (elf_flags)
#define HSACO_ATTR_OFF SET_SRAM_ECC_OFF (elf_flags)
@@ -1036,6 +1049,15 @@ main (int argc, char **argv)
fatal_error (input_location, "unhandled architecture");
}
+ /* Set the generic version. */
+ switch (elf_arch)
+ {
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ...) \
+ case ELF: if (gen_ver) SET_GENERIC_VERSION (elf_flags, gen_ver); break;
+#include "gcn-devices.def"
+#undef GCN_DEVICE
+ }
+
/* Build arguments for compiler pass. */
struct obstack cc_argv_obstack;
obstack_init (&cc_argv_obstack);
diff --git a/libgomp/plugin/plugin-gcn.c b/libgomp/plugin/plugin-gcn.c
index 592a7b6daba..9504358d266 100644
--- a/libgomp/plugin/plugin-gcn.c
+++ b/libgomp/plugin/plugin-gcn.c
@@ -385,7 +385,7 @@ struct gcn_image_desc
typedef enum {
EF_AMDGPU_MACH_UNSUPPORTED = -1,
-#define GCN_DEVICE(name, NAME, ELF, ...) \
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ...) \
EF_AMDGPU_MACH_AMDGCN_ ## NAME = ELF,
#include "../../gcc/config/gcn/gcn-devices.def"
} EF_AMDGPU_MACH;
@@ -1675,7 +1675,7 @@ static const char*
isa_name (int isa) {
switch(isa)
{
-#define GCN_DEVICE(name, NAME, ELF, ...) \
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ...) \
case ELF: return #name;
#include "../../gcc/config/gcn/gcn-devices.def"
}
@@ -1687,7 +1687,7 @@ isa_name (int isa) {
static gcn_isa
isa_code(const char *isa) {
-#define GCN_DEVICE(name, NAME, ELF, ...) \
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ...) \
if (!strcmp (isa, #name)) return ELF;
#include "../../gcc/config/gcn/gcn-devices.def"
@@ -1701,7 +1701,7 @@ max_isa_vgprs (int isa)
{
switch (isa)
{
-#define GCN_DEVICE(name, NAME, ELF, ISA, XNACK, SRAM, WAVE64, CU, \
+#define GCN_DEVICE(gen_ver, name, NAME, ELF, ISA, XNACK, SRAM, WAVE64, CU, \
MAX_ISA_VGPRS, ...) \
case ELF: return MAX_ISA_VGPRS;
#include "../../gcc/config/gcn/gcn-devices.def"
