Hi All, FWIW, the previous patch (gcc-15-4066-g7766a2c1eb6) broke bootstrap on arm-linux-gnueabihf. (reported via https://linaro.atlassian.net/browse/GNU-1364)
Christophe On Mon, 7 Oct 2024 at 10:10, Torbjorn SVENSSON <torbjorn.svens...@foss.st.com> wrote: > > Hello Andre, > > Compared to a run without any of the 2 patches for PR 116444, I get this > diff: > > --- base/m55hard/analysis.gcc 2024-09-18 09:07:18.879493251 +0000 > +++ pr116444/m55hard/analysis.gcc 2024-10-05 11:44:05.261683071 +0000 > +FAIL: gcc.target/arm/attr_thumb.c scan-assembler ite > -FAIL: gcc.target/arm/max-insns-skipped.c object-size text <= 40 > -FAIL: gcc.target/arm/thumb-ifcvt-2.c scan-assembler asreq > -FAIL: gcc.target/arm/thumb-ifcvt-2.c scan-assembler lslne > +FAIL: gcc.target/arm/vseleqdf.c scan-assembler-times vseleq.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vseleqsf.c scan-assembler-times vseleq.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselgedf.c scan-assembler-times vselge.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselgesf.c scan-assembler-times vselge.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselgtdf.c scan-assembler-times vselgt.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselgtsf.c scan-assembler-times vselgt.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselledf.c scan-assembler-times vselgt.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vsellesf.c scan-assembler-times vselgt.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselltdf.c scan-assembler-times vselge.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselltsf.c scan-assembler-times vselge.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselnedf.c scan-assembler-times vseleq.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselnesf.c scan-assembler-times vseleq.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselvcdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselvcsf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselvsdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselvssf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 > --- base/m55soft/analysis.gcc 2024-09-18 09:07:19.199493246 +0000 > +++ pr116444/m55soft/analysis.gcc 2024-10-05 11:44:07.533683037 +0000 > +FAIL: gcc.target/arm/attr_thumb.c scan-assembler ite > -FAIL: gcc.target/arm/max-insns-skipped.c object-size text <= 40 > -FAIL: gcc.target/arm/thumb-ifcvt-2.c scan-assembler asreq > -FAIL: gcc.target/arm/thumb-ifcvt-2.c scan-assembler lslne > +FAIL: gcc.target/arm/vseleqdf.c scan-assembler-times vseleq.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vseleqsf.c scan-assembler-times vseleq.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselgedf.c scan-assembler-times vselge.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselgesf.c scan-assembler-times vselge.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselgtdf.c scan-assembler-times vselgt.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselgtsf.c scan-assembler-times vselgt.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselledf.c scan-assembler-times vselgt.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vsellesf.c scan-assembler-times vselgt.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselltdf.c scan-assembler-times vselge.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselltsf.c scan-assembler-times vselge.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselnedf.c scan-assembler-times vseleq.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselnesf.c scan-assembler-times vseleq.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselvcdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselvcsf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselvsdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselvssf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 > --- base/m85hard/analysis.gcc 2024-09-18 09:07:18.035493264 +0000 > +++ pr116444/m85hard/analysis.gcc 2024-10-05 11:44:04.289683085 +0000 > +FAIL: gcc.target/arm/attr_thumb.c scan-assembler ite > -FAIL: gcc.target/arm/max-insns-skipped.c object-size text <= 40 > -FAIL: gcc.target/arm/thumb-ifcvt-2.c scan-assembler asreq > -FAIL: gcc.target/arm/thumb-ifcvt-2.c scan-assembler lslne > +FAIL: gcc.target/arm/vseleqdf.c scan-assembler-times vseleq.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vseleqsf.c scan-assembler-times vseleq.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselgedf.c scan-assembler-times vselge.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselgesf.c scan-assembler-times vselge.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselgtdf.c scan-assembler-times vselgt.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselgtsf.c scan-assembler-times vselgt.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselledf.c scan-assembler-times vselgt.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vsellesf.c scan-assembler-times vselgt.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselltdf.c scan-assembler-times vselge.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselltsf.c scan-assembler-times vselge.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselnedf.c scan-assembler-times vseleq.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselnesf.c scan-assembler-times vseleq.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselvcdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselvcsf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselvsdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselvssf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 > --- base/m85soft/analysis.gcc 2024-09-18 09:07:18.351493259 +0000 > +++ pr116444/m85soft/analysis.gcc 2024-10-05 11:44:04.957683075 +0000 > +FAIL: gcc.target/arm/attr_thumb.c scan-assembler ite > -FAIL: gcc.target/arm/max-insns-skipped.c object-size text <= 40 > -FAIL: gcc.target/arm/thumb-ifcvt-2.c scan-assembler asreq > -FAIL: gcc.target/arm/thumb-ifcvt-2.c scan-assembler lslne > +FAIL: gcc.target/arm/vseleqdf.c scan-assembler-times vseleq.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vseleqsf.c scan-assembler-times vseleq.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselgedf.c scan-assembler-times vselge.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselgesf.c scan-assembler-times vselge.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselgtdf.c scan-assembler-times vselgt.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselgtsf.c scan-assembler-times vselgt.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselledf.c scan-assembler-times vselgt.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vsellesf.c scan-assembler-times vselgt.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselltdf.c scan-assembler-times vselge.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselltsf.c scan-assembler-times vselge.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselnedf.c scan-assembler-times vseleq.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselnesf.c scan-assembler-times vseleq.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselvcdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselvcsf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 > +FAIL: gcc.target/arm/vselvsdf.c scan-assembler-times vselvs.f64\td[0-9]+ 1 > +FAIL: gcc.target/arm/vselvssf.c scan-assembler-times vselvs.f32\ts[0-9]+ 1 > > > There are 3 test cases that are fixed with these 2 commits, but there is > also a bunch that is marked as new fails. > Looking at the test cases that fail, there are 2 different kinds of > failures. > > 1. gcc.target/arm/attr_thumb.c: This test case fails due to this difference: > --- /dev/fd/63 2024-10-07 08:25:49.595309010 +0000 > +++ /dev/fd/62 2024-10-07 08:25:49.575309010 +0000 > @@ -33,9 +33,10 @@ > @ args = 0, pretend = 0, frame = 0 > @ frame_needed = 0, uses_anonymous_args = 0 > @ link register save eliminated. > - cmp r0, #0 > - ite eq > - moveq r0, #5 > - movne r0, #1 > + cbz r0, .L3 > + movs r0, #1 > + bx lr > +.L3: > + movs r0, #5 > bx lr > .size foo, .-foo > I'll leave the rest of the investigation of the reason for the failure, > and the fix, to you Andre. > > > 2. All other the test cases in the list above: These need to be adapted > to the change introduced in r15-3606-g7d6c6a0d15c to have the proper arch. > I've sent a patch that should fix these "regressions" in > https://gcc.gnu.org/pipermail/gcc-patches/2024-October/664611.html. > > Let me know if you need more details on this. > > Kind regards, > Torbjörn > > On 2024-10-07 06:39, Ramana Radhakrishnan wrote: > > On Fri, Oct 4, 2024 at 9:25 PM Andre Vieira (lists) > > <andre.simoesdiasvie...@arm.com> wrote: > >> > >> Hi, > >> > >> The patch for 'arm: Fix missed CE optimization for armv8.1-m.main [PR > >> 116444]' introduced regressions with arm targets that used 'noce' before. > >> This is because it would approve all noce optimisations without using > >> the default cost check. Not sure why this didn't show up in my original > >> testing, I suspect you need to test this for a set of specific targets > >> like Torbjorn did, thank you for pointing these issues out to me. > >> > >> Could I ask you to rerun them with this patch? I'll try to do that > >> locally too. > >> > >> Happy to receive reviews, but I'm waiting for Torbjorn and my own > >> testing to complete before committing. > >> > >> When not dealing with the special armv8.1-m.main conditional > >> instructions case > >> make sure it uses the default_noce_conversion_profitable_p call to > >> determine > >> whether the sequence is cost effective. > >> > > > > Ok if no regressions. > > > > Ramana > > > >> gcc/ChangeLog: > >> > >> > >> PR target/116444 > >> * config/arm/arm.cc (arm_noce_conversion_profitable_p): Call > >> default_noce_conversion_profitable_p when not dealing with the > >> armv8.1-m.main conditional instructions special cases. >
