Hi all, I'd like to use a value of 64 bytes for the L1 cache size for Armv9-A generic tuning. As described in g:9a99559a478111f7fbeec29bd78344df7651c707 this value is used to set the std::hardware_destructive_interference_size value which we want to be not overly large when running concurrent applications on large core-count systems.
The generic value for Armv8-A systems and the port baseline is 256 bytes
because that's what the A64FX CPU has, as set de-facto in
aarch64_override_options_internal.
But for Armv9-A CPUs as far as I know there isn't anything larger
than 64 bytes, so we should be able to use the smaller value here and reduce
the size of concurrent structs that use
std::hardware_destructive_interference_size to pad their fields.
Bootstrapped and tested on aarch64-none-linux-gnu.
WDYT?
Thanks,
Kyrill
* config/aarch64/tuning_models/generic_armv9_a.h
(generic_armv9a_prefetch_tune): Define.
(generic_armv9_a_tunings): Use the above.
0001-aarch64-Set-Armv9-A-generic-L1-cache-line-size-to-64.patch
Description: 0001-aarch64-Set-Armv9-A-generic-L1-cache-line-size-to-64.patch
