On Wed, Sep 18, 2024 at 01:51:21AM -0400, Michael Meissner wrote:
> On Tue, Sep 17, 2024 at 02:33:09AM -0500, Segher Boessenkool wrote:
> > Hi!
> >
> > On Mon, Sep 16, 2024 at 11:40:45PM -0400, Michael Meissner wrote:
> > > With this patch, GCC now realizes that the vector shift instructions will
> > > look
> > > at the bottom 6 bits for the shift count, and it can use either a
> > > VSPLTISW or
> > > XXSPLTIB instruction to load the shift count.
> >
> > Do we do something like this for integer shift instructions already?
>
> We didn't previously, so shifts greater than 15 required 3 instructions
> (because we needed 2 instructions to load and splat the value since we
> couldn't
> use VSPLTIS{B,H,W}. This patch fixes those shifts as well.
I meant for s{l,r,ra}[wd]i? and such :-)
We use the h or H output modifier for the immediate versions, so those
work fine already, but we don't have patterns for the masked variable
length shifts. Hrm. The only real use case for it is when constructing
multi-register shifts, and it seems we really need to hardcode those
anyway to get it to work well. Hrm.
> > > + operands[4] = ((GET_CODE (operands[2]) == CONST_VECTOR)
> > > + ? CONST_VECTOR_ELT (operands[2], 0)
> > > + : XEXP (operands[2], 0));
> >
> > Useless parens are useless, please lose them?
>
> Done.
Thank you. It sometimes is said that "conditions are written with
parens", but the parens are a required part in the C syntax for
selection statements, instead :-)
> > > --- /dev/null
> > > +++ b/gcc/testsuite/gcc.target/powerpc/pr89213.c
> > > @@ -0,0 +1,106 @@
> > > +/* { dg-do compile { target { lp64 } } } */
> >
> > Why only on 64-bit systems? Does it fail with -m32? Why / how?
> >
> > With that, okay for trunk. Thanks!
>
> After testing, it works on 32-bit systems as well, and I removed the 64-bit
> target requirement.
Great :-)
> I have committed the patch with the 2 changes (lose the extra parenthesis and
> allow the test on 32-bit).
Thanks again!
Segher
