On Wed, 2024-09-11 at 16:17 +0800, 梅杰 wrote: > 在 2024/9/10 17:30, Xi Ruoyao 写道: > > On Tue, 2024-09-10 at 16:50 +0800, 梅杰 wrote: > > > As for the function `__builtin_rint`, although it exists, however, after > > > defining the instruction in `mips.md`, GCC still won't generate > > > `RINT.fmt` > > > instruction for MIPS, it generates following code instead: > > > > > > > lui $28,%hi(__gnu_local_gp) > > > > addiu $28,$28,%lo(__gnu_local_gp) > > > > lw $25,%call16(rint)($28) > > > > .reloc 1f,R_MIPS_JALR,rint > > > > Why? > > > > Whis this: > > > > diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md > > index f147667d63a..0c1ef77a816 100644 > > --- a/gcc/config/mips/mips.md > > +++ b/gcc/config/mips/mips.md > > @@ -100,6 +100,7 @@ (define_c_enum "unspec" [ > > ;; Floating-point unspecs. > > UNSPEC_FMIN > > UNSPEC_FMAX > > + UNSPEC_RINT > > > > ;; HI/LO moves. > > UNSPEC_MFHI > > @@ -8025,6 +8026,14 @@ (define_peephole2 > > (any_extend:SI (match_dup 3)))])] > > "") > > > > +(define_insn "rint<mode>2" > > + [(set (match_operand:SCALARF 0 "register_operand" "=f") > > + (unspec:SCALARF [(match_operand:SCALARF 1 "register_operand" " f")] > > + UNSPEC_RINT))] > > + "mips_isa_rev >= 6" > > + "rint.<fmt>\t%0,%1") > > + > > + > > > > > > ;; Synchronization instructions. > > > > it works for me: > > Yes, you are right! > > I have applied this patch into my current code and I can confirm that > by changing `frint_<mode>` to `rint<mode>2` works. GCC will generate > `RINT.fmt` instruction correctly with built-in funtion `__builtin_rint` > after applying the patch. > > Maybe you can write a patch for `RINT.fmt`? I will update this patch and > remove code related to `RINT.fmt`, if you could do that. At the same time, > could anyone review the rest of this patch? Thanks!
You can use my code in your v2 patch w/o attribution (or with a Co- authored-by if you'd like to attribute anyway). I don't have an r6 hardware and I don't like testing my change solely based on an emulator, so I'd not send a patch myself. -- Xi Ruoyao <xry...@xry111.site> School of Aerospace Science and Technology, Xidian University
