Factorize vorn so that they use parameterized names.
2024-07-11 Christophe Lyon <christophe.l...@linaro.org>
gcc/
* config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC): Add VORNQ_M_S,
VORNQ_M_U.
(MVE_FP_M_BINARY_LOGIC): Add VORNQ_M_F.
(mve_insn): Add VORNQ_M_S, VORNQ_M_U, VORNQ_M_F.
* config/arm/mve.md (mve_vornq_s<mode>): Rename into ...
(@mve_vornq_s<mode>): ... this.
(mve_vornq_u<mode>): Rename into ...
(@mve_vornq_u<mode>): ... this.
(mve_vornq_f<mode>): Rename into ...
(@mve_vornq_f<mode>): ... this.
(mve_vornq_m_<supf><mode>): Merge into vand/vbic pattern.
(mve_vornq_m_f<mode>): Likewise.
---
gcc/config/arm/iterators.md | 3 +++
gcc/config/arm/mve.md | 48 ++++++-------------------------------
2 files changed, 10 insertions(+), 41 deletions(-)
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md
index 162c0d56bfb..3a1825ebab2 100644
--- a/gcc/config/arm/iterators.md
+++ b/gcc/config/arm/iterators.md
@@ -444,6 +444,7 @@ (define_int_iterator MVE_INT_M_BINARY_LOGIC [
VANDQ_M_S VANDQ_M_U
VBICQ_M_S VBICQ_M_U
VEORQ_M_S VEORQ_M_U
+ VORNQ_M_S VORNQ_M_U
VORRQ_M_S VORRQ_M_U
])
@@ -594,6 +595,7 @@ (define_int_iterator MVE_FP_M_BINARY_LOGIC [
VANDQ_M_F
VBICQ_M_F
VEORQ_M_F
+ VORNQ_M_F
VORRQ_M_F
])
@@ -1094,6 +1096,7 @@ (define_int_attr mve_insn [
(VMVNQ_N_S "vmvn") (VMVNQ_N_U "vmvn")
(VNEGQ_M_F "vneg")
(VNEGQ_M_S "vneg")
+ (VORNQ_M_S "vorn") (VORNQ_M_U "vorn") (VORNQ_M_F "vorn")
(VORRQ_M_N_S "vorr") (VORRQ_M_N_U "vorr")
(VORRQ_M_S "vorr") (VORRQ_M_U "vorr") (VORRQ_M_F "vorr")
(VORRQ_N_S "vorr") (VORRQ_N_U "vorr")
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index c0dd4b9019e..3d8b199d9d6 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -1021,9 +1021,9 @@ (define_insn "mve_<mve_addsubmul>q<mode>"
])
;;
-;; [vornq_u, vornq_s])
+;; [vornq_u, vornq_s]
;;
-(define_insn "mve_vornq_s<mode>"
+(define_insn "@mve_vornq_s<mode>"
[
(set (match_operand:MVE_2 0 "s_register_operand" "=w")
(ior:MVE_2 (not:MVE_2 (match_operand:MVE_2 2 "s_register_operand" "w"))
@@ -1035,7 +1035,7 @@ (define_insn "mve_vornq_s<mode>"
(set_attr "type" "mve_move")
])
-(define_expand "mve_vornq_u<mode>"
+(define_expand "@mve_vornq_u<mode>"
[
(set (match_operand:MVE_2 0 "s_register_operand")
(ior:MVE_2 (not:MVE_2 (match_operand:MVE_2 2 "s_register_operand"))
@@ -1429,9 +1429,9 @@ (define_insn "mve_<mve_addsubmul>q_f<mode>"
])
;;
-;; [vornq_f])
+;; [vornq_f]
;;
-(define_insn "mve_vornq_f<mode>"
+(define_insn "@mve_vornq_f<mode>"
[
(set (match_operand:MVE_0 0 "s_register_operand" "=w")
(ior:MVE_0 (not:MVE_0 (match_operand:MVE_0 2 "s_register_operand" "w"))
@@ -2710,6 +2710,7 @@ (define_insn "@mve_<mve_insn>q_m_<supf><mode>"
;; [vandq_m_u, vandq_m_s]
;; [vbicq_m_u, vbicq_m_s]
;; [veorq_m_u, veorq_m_s]
+;; [vornq_m_u, vornq_m_s]
;; [vorrq_m_u, vorrq_m_s]
;;
(define_insn "@mve_<mve_insn>q_m_<supf><mode>"
@@ -2836,24 +2837,6 @@ (define_insn "@mve_<mve_insn>q_int_m_<supf><mode>"
(set_attr "type" "mve_move")
(set_attr "length""8")])
-;;
-;; [vornq_m_u, vornq_m_s])
-;;
-(define_insn "mve_vornq_m_<supf><mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
- (match_operand:MVE_2 2 "s_register_operand" "w")
- (match_operand:MVE_2 3 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 4 "vpr_register_operand"
"Up")]
- VORNQ_M))
- ]
- "TARGET_HAVE_MVE"
- "vpst\;vornt\t%q0, %q2, %q3"
- [(set (attr "mve_unpredicated_insn") (symbol_ref
"CODE_FOR_mve_vornq_<supf><mode>"))
- (set_attr "type" "mve_move")
- (set_attr "length""8")])
-
;;
;; [vqshlq_m_n_s, vqshlq_m_n_u]
;; [vshlq_m_n_s, vshlq_m_n_u]
@@ -3108,6 +3091,7 @@ (define_insn "@mve_<mve_insn>q_m_n_f<mode>"
;; [vandq_m_f]
;; [vbicq_m_f]
;; [veorq_m_f]
+;; [vornq_m_f]
;; [vorrq_m_f]
;;
(define_insn "@mve_<mve_insn>q_m_f<mode>"
@@ -3187,24 +3171,6 @@ (define_insn "@mve_<mve_insn>q<mve_rot>_m_f<mode>"
(set_attr "type" "mve_move")
(set_attr "length""8")])
-;;
-;; [vornq_m_f])
-;;
-(define_insn "mve_vornq_m_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
- (match_operand:MVE_0 2 "s_register_operand" "w")
- (match_operand:MVE_0 3 "s_register_operand" "w")
- (match_operand:<MVE_VPRED> 4 "vpr_register_operand"
"Up")]
- VORNQ_M_F))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vpst\;vornt\t%q0, %q2, %q3"
- [(set (attr "mve_unpredicated_insn") (symbol_ref
"CODE_FOR_mve_vornq_f<mode>"))
- (set_attr "type" "mve_move")
- (set_attr "length""8")])
-
;;
;; [vstrbq_s vstrbq_u]
;;
--
2.34.1
