On Thu, Aug 22, 2024 at 4:06 PM HAO CHEN GUI <guih...@linux.ibm.com> wrote: > > Hi Hongtao, > > 在 2024/8/21 11:21, Hongtao Liu 写道: > > r15-3058-gbb42c551905024 support const0 operand for movv16qi, please > > rebase your patch and see if there's still the regressions. > > There's still regressions. The patch enables V16QI const0 store, but > it also enables V8QI const0 store. The vector mode is preferable than > scalar mode so that V8QI is used for 8-byte memory clear instead of > DI. It's sub-optimal. Could we check if mode_size is greater than HOST_BITS_PER_WIDE_INT? > > Another issue is it takes lots of subreg to generate an all-zero > V16QI register sometime. As PR92080 has been fixed, it can't reuse > existing all-zero V16QI register. > > (insn 16 15 17 (set (reg:V4SI 118) > (const_vector:V4SI [ > (const_int 0 [0]) repeated x4 > ])) "auto-init-7.c":25:12 -1 > (nil)) > > (insn 17 16 18 (set (reg:V8HI 117) > (subreg:V8HI (reg:V4SI 118) 0)) "auto-init-7.c":25:12 -1 > (nil)) > > (insn 18 17 19 (set (reg:V16QI 116) > (subreg:V16QI (reg:V8HI 117) 0)) "auto-init-7.c":25:12 -1 > (nil)) > > (insn 19 18 0 (set (mem/c:V16QI (plus:DI (reg:DI 114) > (const_int 12 [0xc])) [0 MEM <char[1:28]> [(void *)&temp3]+12 > S16 A32]) > (reg:V16QI 116)) "auto-init-7.c":25:12 -1 > (nil)) I think those subregs can be simplified by later rtl passes? > > Thanks > Gui Haochen
-- BR, Hongtao
