From: "Hu, Lin1" <lin1...@intel.com>

gcc/ChangeLog:

        * config/i386/avx10_2roundingintrin.h: New intrins.
        * config/i386/i386-builtin.def (BDESC): Add new builtins.

gcc/testsuite/ChangeLog:

        * gcc.target/i386/avx-1.c: Add new builtin test.
        * gcc.target/i386/sse-13.c: Ditto.
        * gcc.target/i386/sse-14.c: Ditto.
        * gcc.target/i386/sse-22.c: Add new macro test.
        * gcc.target/i386/sse-23.c: Ditto.
        * gcc.target/i386/avx10_2-rounding-3.c: Add test.
---
 gcc/config/i386/avx10_2roundingintrin.h       | 339 ++++++++++++++++++
 gcc/config/i386/i386-builtin.def              |   6 +
 gcc/testsuite/gcc.target/i386/avx-1.c         |   6 +
 .../gcc.target/i386/avx10_2-rounding-3.c      |  50 +++
 gcc/testsuite/gcc.target/i386/sse-13.c        |   7 +
 gcc/testsuite/gcc.target/i386/sse-14.c        |  18 +
 gcc/testsuite/gcc.target/i386/sse-22.c        |  15 +
 gcc/testsuite/gcc.target/i386/sse-23.c        |   6 +
 8 files changed, 447 insertions(+)

diff --git a/gcc/config/i386/avx10_2roundingintrin.h 
b/gcc/config/i386/avx10_2roundingintrin.h
index f35f2337858..c7146e37ec9 100644
--- a/gcc/config/i386/avx10_2roundingintrin.h
+++ b/gcc/config/i386/avx10_2roundingintrin.h
@@ -3986,6 +3986,216 @@ _mm256_maskz_scalef_round_ps (__mmask8 __U, __m256 __A, 
__m256 __B,
                                                         (__mmask8) __U,
                                                         __R);
 }
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sqrt_round_pd (__m256d __A, const int __R)
+{
+  return (__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) __A,
+                                                       (__v4df)
+                                                       _mm256_undefined_pd (),
+                                                       (__mmask8) -1,
+                                                       __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_sqrt_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
+                          const int __R)
+{
+  return (__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) __A,
+                                                       (__v4df) __W,
+                                                       (__mmask8) __U,
+                                                       __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_sqrt_round_pd (__mmask8 __U, __m256d __A, const int __R)
+{
+  return (__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) __A,
+                                                       (__v4df)
+                                                       _mm256_setzero_pd (),
+                                                       (__mmask8) __U,
+                                                       __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sqrt_round_ph (__m256h __A, const int __R)
+{
+  return (__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) __A,
+                                                       (__v16hf)
+                                                       _mm256_undefined_ph (),
+                                                       (__mmask16) -1,
+                                                       __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_sqrt_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
+                          const int __R)
+{
+  return (__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) __A,
+                                                       (__v16hf) __W,
+                                                       (__mmask16) __U,
+                                                       __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_sqrt_round_ph (__mmask16 __U, __m256h __A, const int __R)
+{
+  return (__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) __A,
+                                                       (__v16hf)
+                                                       _mm256_setzero_ph (),
+                                                       (__mmask16) __U,
+                                                       __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sqrt_round_ps (__m256 __A, const int __R)
+{
+  return (__m256) __builtin_ia32_sqrtps256_mask_round ((__v8sf) __A,
+                                                      (__v8sf)
+                                                      _mm256_undefined_ps (),
+                                                      (__mmask8) -1,
+                                                      __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_sqrt_round_ps (__m256 __W, __mmask8 __U, __m256 __A,
+                          const int __R)
+{
+  return (__m256) __builtin_ia32_sqrtps256_mask_round ((__v8sf) __A,
+                                                      (__v8sf) __W,
+                                                      (__mmask8) __U,
+                                                      __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_sqrt_round_ps (__mmask8 __U, __m256 __A, const int __R)
+{
+  return (__m256) __builtin_ia32_sqrtps256_mask_round ((__v8sf) __A,
+                                                      (__v8sf)
+                                                      _mm256_setzero_ps (),
+                                                      (__mmask8) __U,
+                                                      __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sub_round_pd (__m256d __A, __m256d __B, const int __R)
+{
+  return (__m256d) __builtin_ia32_subpd256_mask_round ((__v4df) __A,
+                                                      (__v4df) __B,
+                                                      (__v4df)
+                                                      _mm256_undefined_pd (),
+                                                      (__mmask8) -1,
+                                                      __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_sub_round_pd (__m256d __W, __mmask8 __U, __m256d __A,
+                         __m256d __B, const int __R)
+{
+  return (__m256d) __builtin_ia32_subpd256_mask_round ((__v4df) __A,
+                                                      (__v4df) __B,
+                                                      (__v4df) __W,
+                                                      (__mmask8) __U,
+                                                      __R);
+}
+
+extern __inline __m256d
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_sub_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
+                          const int __R)
+{
+  return (__m256d) __builtin_ia32_subpd256_mask_round ((__v4df) __A,
+                                                      (__v4df) __B,
+                                                      (__v4df)
+                                                      _mm256_setzero_pd (),
+                                                      (__mmask8) __U,
+                                                      __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sub_round_ph (__m256h __A, __m256h __B, const int __R)
+{
+  return (__m256h) __builtin_ia32_subph256_mask_round ((__v16hf) __A,
+                                                      (__v16hf) __B,
+                                                      (__v16hf)
+                                                      _mm256_undefined_ph (),
+                                                      (__mmask16) -1,
+                                                      __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_sub_round_ph (__m256h __W, __mmask16 __U, __m256h __A,
+                         __m256h __B, const int __R)
+{
+  return (__m256h) __builtin_ia32_subph256_mask_round ((__v16hf) __A,
+                                                      (__v16hf) __B,
+                                                      (__v16hf) __W,
+                                                      (__mmask16) __U,
+                                                      __R);
+}
+
+extern __inline __m256h
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_sub_round_ph (__mmask16 __U, __m256h __A, __m256h __B,
+                          const int __R)
+{
+  return (__m256h) __builtin_ia32_subph256_mask_round ((__v16hf) __A,
+                                                      (__v16hf) __B,
+                                                      (__v16hf)
+                                                      _mm256_setzero_ph (),
+                                                      (__mmask16) __U,
+                                                      __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_sub_round_ps (__m256 __A, __m256 __B, const int __R)
+{
+  return (__m256) __builtin_ia32_subps256_mask_round ((__v8sf) __A,
+                                                     (__v8sf) __B,
+                                                     (__v8sf)
+                                                     _mm256_undefined_ps (),
+                                                     (__mmask8) -1,
+                                                     __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_sub_round_ps (__m256 __W, __mmask8 __U, __m256 __A, __m256 __B,
+                         const int __R)
+{
+  return (__m256) __builtin_ia32_subps256_mask_round ((__v8sf) __A,
+                                                     (__v8sf) __B,
+                                                     (__v8sf) __W,
+                                                     (__mmask8) __U,
+                                                     __R);
+}
+
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_sub_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
+                          const int __R)
+{
+  return (__m256) __builtin_ia32_subps256_mask_round ((__v8sf) __A,
+                                                     (__v8sf) __B,
+                                                     (__v8sf)
+                                                     _mm256_setzero_ps (),
+                                                     (__mmask8) __U,
+                                                     __R);
+}
 #else
 #define _mm256_add_round_pd(A, B, R) \
   ((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \
@@ -6072,6 +6282,135 @@ _mm256_maskz_scalef_round_ps (__mmask8 __U, __m256 __A, 
__m256 __B,
                                                   (_mm256_setzero_ps ()), \
                                                   (__mmask8) (U), \
                                                   (R)))
+
+#define _mm256_sqrt_round_pd(A, R) \
+  ((__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) (A), \
+                                                 (__v4df) \
+                                                 (_mm256_undefined_pd ()), \
+                                                 (__mmask8) (-1), \
+                                                 (R)))
+
+#define _mm256_mask_sqrt_round_pd(W, U, A, R) \
+  ((__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) (A), \
+                                                 (__v4df) (W), \
+                                                 (__mmask8) (U), \
+                                                 (R)))
+
+#define _mm256_maskz_sqrt_round_pd(U, A, R) \
+  ((__m256d) __builtin_ia32_sqrtpd256_mask_round ((__v4df) (A), \
+                                                 (__v4df) \
+                                                 (_mm256_setzero_pd ()), \
+                                                 (__mmask8) (U), \
+                                                 (R)))
+
+#define _mm256_sqrt_round_ph(A, R) \
+  ((__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) (A), \
+                                                 (__v16hf) \
+                                                 (_mm256_undefined_ph ()), \
+                                                 (__mmask16) (-1), \
+                                                 (R)))
+
+#define _mm256_mask_sqrt_round_ph(W, U, A, R) \
+  ((__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) (A), \
+                                                 (__v16hf) (W), \
+                                                 (__mmask16) (U), \
+                                                 (R)))
+
+#define _mm256_maskz_sqrt_round_ph(U, A, R) \
+  ((__m256h) __builtin_ia32_sqrtph256_mask_round ((__v16hf) (A), \
+                                                 (__v16hf) \
+                                                 (_mm256_setzero_ph ()), \
+                                                 (__mmask16) (U), \
+                                                 (R)))
+
+#define _mm256_sqrt_round_ps(A, R) \
+  ((__m256) __builtin_ia32_sqrtps256_mask_round ((__v8sf) (A), \
+                                                (__v8sf) \
+                                                (_mm256_undefined_ps ()), \
+                                                (__mmask8) (-1), \
+                                                (R)))
+
+#define _mm256_mask_sqrt_round_ps(W, U, A, R) \
+  ((__m256) __builtin_ia32_sqrtps256_mask_round ((__v8sf) (A), \
+                                                (__v8sf) (W), \
+                                                (__mmask8) (U), \
+                                                (R)))
+
+#define _mm256_maskz_sqrt_round_ps(U, A, R) \
+  ((__m256) __builtin_ia32_sqrtps256_mask_round ((__v8sf) (A), \
+                                                (__v8sf) \
+                                                (_mm256_setzero_ps ()), \
+                                                (__mmask8) (U), \
+                                                (R)))
+
+#define _mm256_sub_round_pd(A, B, R) \
+  ((__m256d) __builtin_ia32_subpd256_mask_round ((__v4df) (A), \
+                                                (__v4df) (B), \
+                                                (__v4df) \
+                                                (_mm256_undefined_pd ()), \
+                                                (__mmask8) (-1), \
+                                                (R)))
+
+#define _mm256_mask_sub_round_pd(W, U, A, B, R) \
+  ((__m256d) __builtin_ia32_subpd256_mask_round ((__v4df) (A), \
+                                                (__v4df) (B), \
+                                                (__v4df) (W), \
+                                                (__mmask8) (U), \
+                                                (R)))
+
+#define _mm256_maskz_sub_round_pd(U, A, B, R) \
+  ((__m256d) __builtin_ia32_subpd256_mask_round ((__v4df) (A), \
+                                                (__v4df) (B), \
+                                                (__v4df) \
+                                                (_mm256_setzero_pd ()), \
+                                                (__mmask8) (U), \
+                                                (R)))
+
+#define _mm256_sub_round_ph(A, B, R) \
+  ((__m256h) __builtin_ia32_subph256_mask_round ((__v16hf) (A), \
+                                                (__v16hf) (B), \
+                                                (__v16hf) \
+                                                (_mm256_undefined_ph ()), \
+                                                (__mmask16) (-1), \
+                                                (R)))
+
+#define _mm256_mask_sub_round_ph(W, U, A, B, R) \
+  ((__m256h) __builtin_ia32_subph256_mask_round ((__v16hf) (A), \
+                                                (__v16hf) (B), \
+                                                (__v16hf) (W), \
+                                                (__mmask16) (U), \
+                                                (R)))
+
+#define _mm256_maskz_sub_round_ph(U, A, B, R) \
+  ((__m256h) __builtin_ia32_subph256_mask_round ((__v16hf) (A), \
+                                                (__v16hf) (B), \
+                                                (__v16hf) \
+                                                (_mm256_setzero_ph ()), \
+                                                (__mmask16) (U), \
+                                                (R)))
+
+#define _mm256_sub_round_ps(A, B, R) \
+  ((__m256) __builtin_ia32_subps256_mask_round ((__v8sf) (A), \
+                                               (__v8sf) (B), \
+                                               (__v8sf) \
+                                               (_mm256_undefined_ps ()), \
+                                               (__mmask8) (-1), \
+                                               (R)))
+
+#define _mm256_mask_sub_round_ps(W, U, A, B, R) \
+  ((__m256) __builtin_ia32_subps256_mask_round ((__v8sf) (A), \
+                                               (__v8sf) (B), \
+                                               (__v8sf) (W), \
+                                               (__mmask8) (U), \
+                                               (R)))
+
+#define _mm256_maskz_sub_round_ps(U, A, B, R) \
+  ((__m256) __builtin_ia32_subps256_mask_round ((__v8sf) (A), \
+                                               (__v8sf) (B), \
+                                               (__v8sf) \
+                                               (_mm256_setzero_ps ()), \
+                                               (__mmask8) (U), \
+                                               (R)))
 #endif
 
 #define _mm256_cmul_round_pch(A, B, R) _mm256_fcmul_round_pch ((A), (B), (R))
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 8be3e117f76..416944f8b5b 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -3471,6 +3471,12 @@ BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, 
CODE_FOR_avx512vl_rndscalev8sf_mask_roun
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, 
CODE_FOR_avx512vl_scalefv4df_mask_round, 
"__builtin_ia32_scalefpd256_mask_round", IX86_BUILTIN_VSCALEFPD256_MASK_ROUND, 
UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, 
CODE_FOR_avx512vl_scalefv16hf_mask_round, 
"__builtin_ia32_scalefph256_mask_round", IX86_BUILTIN_VSCALEFPH256_MASK_ROUND, 
UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
 BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, 
CODE_FOR_avx512vl_scalefv8sf_mask_round, 
"__builtin_ia32_scalefps256_mask_round", IX86_BUILTIN_VSCALEFPS256_MASK_ROUND, 
UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,  CODE_FOR_avx_sqrtv4df2_mask_round, 
"__builtin_ia32_sqrtpd256_mask_round", IX86_BUILTIN_VSQRTPD256_MASK_ROUND, 
UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,  
CODE_FOR_avx512fp16_sqrtv16hf2_mask_round, 
"__builtin_ia32_sqrtph256_mask_round", IX86_BUILTIN_VSQRTPH256_MASK_ROUND, 
UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_UHI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256,  CODE_FOR_avx_sqrtv8sf2_mask_round, 
"__builtin_ia32_sqrtps256_mask_round", IX86_BUILTIN_VSQRTPS256_MASK_ROUND, 
UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_subv4df3_mask_round, 
"__builtin_ia32_subpd256_mask_round", IX86_BUILTIN_VSUBPD256_MASK_ROUND, 
UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_subv16hf3_mask_round, 
"__builtin_ia32_subph256_mask_round", IX86_BUILTIN_VSUBPH256_MASK_ROUND, 
UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
+BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_subv8sf3_mask_round, 
"__builtin_ia32_subps256_mask_round", IX86_BUILTIN_VSUBPS256_MASK_ROUND, 
UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
 
 BDESC_END (ROUND_ARGS, MULTI_ARG)
 
diff --git a/gcc/testsuite/gcc.target/i386/avx-1.c 
b/gcc/testsuite/gcc.target/i386/avx-1.c
index e41a4ecdcd6..f64d0c88264 100644
--- a/gcc/testsuite/gcc.target/i386/avx-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx-1.c
@@ -995,6 +995,12 @@
 #define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefph256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtpd256_mask_round(A, B, C, 8)
+#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtph256_mask_round(A, B, C, 8)
+#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) 
__builtin_ia32_subpd256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) 
__builtin_ia32_subph256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) 
__builtin_ia32_subps256_mask_round(A, B, C, D, 8)
 
 #include <wmmintrin.h>
 #include <immintrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c 
b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
index 331e79ce1fa..f065785d23e 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-rounding-3.c
@@ -183,6 +183,24 @@
 /* { dg-final { scan-assembler-times "vscalefps\[ 
\\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
 /* { dg-final { scan-assembler-times "vscalefps\[ 
\\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 
 }  } */
 /* { dg-final { scan-assembler-times "vscalefps\[ 
\\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ 
\\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ 
\\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ 
\\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 
 }  } */
+/* { dg-final { scan-assembler-times "vsqrtpd\[ 
\\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ 
\\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ 
\\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ 
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[
 \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsqrtph\[ 
\\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
 \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ 
\\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ 
\\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 
 }  } */
+/* { dg-final { scan-assembler-times "vsqrtps\[ 
\\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ 
\\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsubpd\[ 
\\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsubpd\[ 
\\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 
 }  } */
+/* { dg-final { scan-assembler-times "vsubpd\[ 
\\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ 
\\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsubph\[ 
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[
 \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsubph\[ 
\\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[
 \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsubph\[ 
\\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[
 \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsubps\[ 
\\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1  }  } */
+/* { dg-final { scan-assembler-times "vsubps\[ 
\\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 
 }  } */
+/* { dg-final { scan-assembler-times "vsubps\[ 
\\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ 
\\t\]+#)" 1  }  } */
 
 #include <immintrin.h>
 
@@ -549,3 +567,35 @@ avx10_2_test_24 (void)
   x = _mm256_mask_scalef_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | 
_MM_FROUND_NO_EXC);
   x = _mm256_maskz_scalef_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | 
_MM_FROUND_NO_EXC);
 }
+
+void extern
+avx10_2_test_25 (void)
+{
+  xd = _mm256_sqrt_round_pd (xd, _MM_FROUND_TO_NEAREST_INT | 
_MM_FROUND_NO_EXC);
+  xd = _mm256_mask_sqrt_round_pd (xd, m8, xd, _MM_FROUND_TO_NEG_INF | 
_MM_FROUND_NO_EXC);
+  xd = _mm256_maskz_sqrt_round_pd (m8, xd, _MM_FROUND_TO_ZERO | 
_MM_FROUND_NO_EXC);
+
+  xh = _mm256_sqrt_round_ph (xh, 4);
+  xh = _mm256_mask_sqrt_round_ph (xh, m16, xh, 8);
+  xh = _mm256_maskz_sqrt_round_ph (m16, xh, 11);
+
+  x = _mm256_sqrt_round_ps (x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+  x = _mm256_mask_sqrt_round_ps (x, m8, x, _MM_FROUND_TO_POS_INF | 
_MM_FROUND_NO_EXC);
+  x = _mm256_maskz_sqrt_round_ps (m8, x, _MM_FROUND_TO_ZERO | 
_MM_FROUND_NO_EXC);
+}
+
+void extern
+avx10_2_test_26 (void)
+{
+  xd = _mm256_sub_round_pd (xd, xd, _MM_FROUND_TO_NEAREST_INT | 
_MM_FROUND_NO_EXC);
+  xd = _mm256_mask_sub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | 
_MM_FROUND_NO_EXC);
+  xd = _mm256_maskz_sub_round_pd (m8, xd, xd, _MM_FROUND_TO_ZERO | 
_MM_FROUND_NO_EXC);
+  
+  xh = _mm256_sub_round_ph (xh, xh, 8);
+  xh = _mm256_mask_sub_round_ph (xh, m16, xh, xh, 8);
+  xh = _mm256_maskz_sub_round_ph (m16, xh, xh, 11);
+
+  x = _mm256_sub_round_ps (x, x, _MM_FROUND_TO_NEAREST_INT | 
_MM_FROUND_NO_EXC);
+  x = _mm256_mask_sub_round_ps (x, m8, x, x, _MM_FROUND_TO_POS_INF | 
_MM_FROUND_NO_EXC);
+  x = _mm256_maskz_sub_round_ps (m8, x, x, _MM_FROUND_TO_ZERO | 
_MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c 
b/gcc/testsuite/gcc.target/i386/sse-13.c
index a393e28c54e..a5b1775ed2d 100644
--- a/gcc/testsuite/gcc.target/i386/sse-13.c
+++ b/gcc/testsuite/gcc.target/i386/sse-13.c
@@ -1002,5 +1002,12 @@
 #define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefph256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtpd256_mask_round(A, B, C, 8)
+#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtph256_mask_round(A, B, C, 8)
+#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) 
__builtin_ia32_subpd256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) 
__builtin_ia32_subph256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) 
__builtin_ia32_subps256_mask_round(A, B, C, D, 8)
 
 #include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/i386/sse-14.c 
b/gcc/testsuite/gcc.target/i386/sse-14.c
index ddec892824c..4736b2a5d52 100644
--- a/gcc/testsuite/gcc.target/i386/sse-14.c
+++ b/gcc/testsuite/gcc.target/i386/sse-14.c
@@ -1069,6 +1069,9 @@ test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8)
 test_1 (_mm256_getexp_round_pd, __m256d, __m256d, 8)
 test_1 (_mm256_getexp_round_ph, __m256h, __m256h, 8)
 test_1 (_mm256_getexp_round_ps, __m256, __m256, 8)
+test_1 (_mm256_sqrt_round_pd, __m256d, __m256d, 9)
+test_1 (_mm256_sqrt_round_ph, __m256h, __m256h, 9)
+test_1 (_mm256_sqrt_round_ps, __m256, __m256, 9)
 test_1x (_mm256_reduce_round_ph, __m256h, __m256h, 123, 8)
 test_1x (_mm256_reduce_round_ps, __m256, __m256, 123, 8)
 test_1x (_mm256_reduce_round_pd, __m256d, __m256d, 123, 8)
@@ -1147,6 +1150,12 @@ test_2 (_mm256_mul_round_ps, __m256, __m256, __m256, 9)
 test_2 (_mm256_scalef_round_pd, __m256d, __m256d, __m256d, 9)
 test_2 (_mm256_scalef_round_ph, __m256h, __m256h, __m256h, 9)
 test_2 (_mm256_scalef_round_ps, __m256, __m256, __m256, 9)
+test_2 (_mm256_maskz_sqrt_round_pd, __m256d, __mmask8,  __m256d, 9)
+test_2 (_mm256_maskz_sqrt_round_ph, __m256h, __mmask16,  __m256h, 9)
+test_2 (_mm256_maskz_sqrt_round_ps, __m256, __mmask8,  __m256, 9)
+test_2 (_mm256_sub_round_pd, __m256d, __m256d, __m256d, 9)
+test_2 (_mm256_sub_round_ph, __m256h, __m256h, __m256h, 9)
+test_2 (_mm256_sub_round_ps, __m256, __m256, __m256, 9)
 test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
 test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
 test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
@@ -1251,6 +1260,12 @@ test_3 (_mm256_maskz_mul_round_ps, __m256, __mmask8, 
__m256, __m256, 9)
 test_3 (_mm256_maskz_scalef_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
 test_3 (_mm256_maskz_scalef_round_ph, __m256h, __mmask16, __m256h, __m256h, 9)
 test_3 (_mm256_maskz_scalef_round_ps, __m256, __mmask8, __m256, __m256, 9)
+test_3 (_mm256_mask_sqrt_round_pd, __m256d, __m256d, __mmask8,  __m256d, 9)
+test_3 (_mm256_mask_sqrt_round_ph, __m256h, __m256h, __mmask16,  __m256h, 9)
+test_3 (_mm256_mask_sqrt_round_ps, __m256, __m256, __mmask8,  __m256, 9)
+test_3 (_mm256_maskz_sub_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
+test_3 (_mm256_maskz_sub_round_ph, __m256h, __mmask16, __m256h, __m256h, 9)
+test_3 (_mm256_maskz_sub_round_ps, __m256, __mmask8, __m256, __m256, 9)
 test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 
1, 8)
 test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, 
__m256h, 1, 8)
 test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 
8)
@@ -1347,6 +1362,9 @@ test_4 (_mm256_mask_mul_round_ps, __m256, __m256, 
__mmask8, __m256, __m256, 9)
 test_4 (_mm256_mask_scalef_round_pd, __m256d, __m256d, __mmask8, __m256d, 
__m256d, 9)
 test_4 (_mm256_mask_scalef_round_ph, __m256h, __m256h, __mmask16, __m256h, 
__m256h, 9)
 test_4 (_mm256_mask_scalef_round_ps, __m256, __m256, __mmask8, __m256, __m256, 
9)
+test_4 (_mm256_mask_sub_round_pd, __m256d, __m256d, __mmask8, __m256d, 
__m256d, 9)
+test_4 (_mm256_mask_sub_round_ph, __m256h, __m256h, __mmask16, __m256h, 
__m256h, 9)
+test_4 (_mm256_mask_sub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
 test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, 
__m256i, 3, 8)
 test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, 
__m256i, 3, 8)
 test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, 
__m256i, 3, 8)
diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c 
b/gcc/testsuite/gcc.target/i386/sse-22.c
index b5d964552bc..5bfccd52630 100644
--- a/gcc/testsuite/gcc.target/i386/sse-22.c
+++ b/gcc/testsuite/gcc.target/i386/sse-22.c
@@ -1112,6 +1112,9 @@ test_1 (_mm256_cvt_roundepi16_ph, __m256h, __m256i, 8)
 test_1 (_mm256_getexp_round_pd, __m256d, __m256d, 8)
 test_1 (_mm256_getexp_round_ph, __m256h, __m256h, 8)
 test_1 (_mm256_getexp_round_ps, __m256, __m256, 8)
+test_1 (_mm256_sqrt_round_pd, __m256d, __m256d, 9)
+test_1 (_mm256_sqrt_round_ph, __m256h, __m256h, 9)
+test_1 (_mm256_sqrt_round_ps, __m256, __m256, 9)
 test_1x (_mm256_reduce_round_ph, __m256h, __m256h, 123, 8)
 test_1x (_mm256_reduce_round_ps, __m256, __m256, 123, 8)
 test_1x (_mm256_reduce_round_pd, __m256d, __m256d, 123, 8)
@@ -1190,6 +1193,12 @@ test_2 (_mm256_mul_round_ps, __m256, __m256, __m256, 9)
 test_2 (_mm256_scalef_round_pd, __m256d, __m256d, __m256d, 9)
 test_2 (_mm256_scalef_round_ph, __m256h, __m256h, __m256h, 9)
 test_2 (_mm256_scalef_round_ps, __m256, __m256, __m256, 9)
+test_2 (_mm256_maskz_sqrt_round_pd, __m256d, __mmask8,  __m256d, 9)
+test_2 (_mm256_maskz_sqrt_round_ph, __m256h, __mmask16,  __m256h, 9)
+test_2 (_mm256_maskz_sqrt_round_ps, __m256, __mmask8,  __m256, 9)
+test_2 (_mm256_sub_round_pd, __m256d, __m256d, __m256d, 9)
+test_2 (_mm256_sub_round_ph, __m256h, __m256h, __m256h, 9)
+test_2 (_mm256_sub_round_ps, __m256, __m256, __m256, 9)
 test_2x (_mm256_cmp_round_pd_mask, __mmask8, __m256d, __m256d, 1, 8)
 test_2x (_mm256_cmp_round_ph_mask, __mmask16, __m256h, __m256h, 1, 8)
 test_2x (_mm256_cmp_round_ps_mask, __mmask8, __m256, __m256, 1, 8)
@@ -1293,6 +1302,9 @@ test_3 (_mm256_maskz_mul_round_ps, __m256, __mmask8, 
__m256, __m256, 9)
 test_3 (_mm256_maskz_scalef_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
 test_3 (_mm256_maskz_scalef_round_ph, __m256h, __mmask16, __m256h, __m256h, 9)
 test_3 (_mm256_maskz_scalef_round_ps, __m256, __mmask8, __m256, __m256, 9)
+test_3 (_mm256_maskz_sub_round_pd, __m256d, __mmask8, __m256d, __m256d, 9)
+test_3 (_mm256_maskz_sub_round_ph, __m256h, __mmask16, __m256h, __m256h, 9)
+test_3 (_mm256_maskz_sub_round_ps, __m256, __mmask8, __m256, __m256, 9)
 test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 
1, 8)
 test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, 
__m256h, 1, 8)
 test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 
8)
@@ -1389,6 +1401,9 @@ test_4 (_mm256_mask_mul_round_ps, __m256, __m256, 
__mmask8, __m256, __m256, 9)
 test_4 (_mm256_mask_scalef_round_pd, __m256d, __m256d, __mmask8, __m256d, 
__m256d, 9)
 test_4 (_mm256_mask_scalef_round_ph, __m256h, __m256h, __mmask16, __m256h, 
__m256h, 9)
 test_4 (_mm256_mask_scalef_round_ps, __m256, __m256, __mmask8, __m256, __m256, 
9)
+test_4 (_mm256_mask_sub_round_pd, __m256d, __m256d, __mmask8, __m256d, 
__m256d, 9)
+test_4 (_mm256_mask_sub_round_ph, __m256h, __m256h, __mmask16, __m256h, 
__m256h, 9)
+test_4 (_mm256_mask_sub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
 test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, 
__m256i, 3, 8)
 test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, 
__m256i, 3, 8)
 test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, 
__m256i, 3, 8)
diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c 
b/gcc/testsuite/gcc.target/i386/sse-23.c
index bd9f93db8cd..e63c100f452 100644
--- a/gcc/testsuite/gcc.target/i386/sse-23.c
+++ b/gcc/testsuite/gcc.target/i386/sse-23.c
@@ -977,6 +977,12 @@
 #define __builtin_ia32_scalefpd256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefpd256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_scalefph256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefph256_mask_round(A, B, C, D, 8)
 #define __builtin_ia32_scalefps256_mask_round(A, B, C, D, E) 
__builtin_ia32_scalefps256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_sqrtpd256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtpd256_mask_round(A, B, C, 8)
+#define __builtin_ia32_sqrtph256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtph256_mask_round(A, B, C, 8)
+#define __builtin_ia32_sqrtps256_mask_round(A, B, C, D) 
__builtin_ia32_sqrtps256_mask_round(A, B, C, 8)
+#define __builtin_ia32_subpd256_mask_round(A, B, C, D, E) 
__builtin_ia32_subpd256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_subph256_mask_round(A, B, C, D, E) 
__builtin_ia32_subph256_mask_round(A, B, C, D, 8)
+#define __builtin_ia32_subps256_mask_round(A, B, C, D, E) 
__builtin_ia32_subps256_mask_round(A, B, C, D, 8)
 
 #pragma GCC target 
("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,sha,xsavec,xsaves,clflushopt,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,vpclmulqdq,pconfig,wbnoinvd,enqcmd,avx512vp2intersect,serialize,tsxldtrk,amx-tile,amx-int8,amx-bf16,kl,widekl,avxvnni,avxifma,avxvnniint8,avxneconvert,cmpccxadd,amx-fp16,prefetchi,raoint,amx-complex,avxvnniint16,sm3,sha512,sm4,avx10.2-512")
 
-- 
2.31.1

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