On 8/13/24 9:47 PM, Li, Pan2 wrote:
+static rtx
+riscv_gen_unsigned_xmode_reg (rtx x, machine_mode mode)
+{
+ if (!CONST_INT_P (x))
+ return gen_lowpart (Xmode, x);
+
+ rtx xmode_x = gen_reg_rtx (Xmode);
+ HOST_WIDE_INT cst = INTVAL (x);
+
+ emit_move_insn (xmode_x, x);
+
+ int xmode_bits = GET_MODE_BITSIZE (Xmode);
+ int mode_bits = GET_MODE_BITSIZE (mode).to_constant ();
+
+ if (cst < 0 && mode_bits < xmode_bits)
+ {
+ int shift_bits = xmode_bits - mode_bits;
+
+ riscv_emit_binary (ASHIFT, xmode_x, xmode_x, GEN_INT (shift_bits));
+ riscv_emit_binary (LSHIFTRT, xmode_x, xmode_x, GEN_INT (shift_bits));
+ }
Isn't this a zero_extension?
I am not sure it is valid for zero_extend, given the incoming rtx x is
const_int which is DImode(integer promoted)
for ussub<qi>.
I will rebase this patch after PR116278 commit, and give a try for this.
But you're shifting a REG, not a CONST_INT.
Jeff
