On Thu, Jul 25, 2024 at 10:25 PM Andrew Pinski <quic_apin...@quicinc.com> wrote:
>
> The problem here is the aarch64 backend enables -mearly-ra at -O2 and above 
> but
> it is not marked as an Optimization in the .opt file so enabling it sometimes
> reset the target options when going from -O1 to -O2 for the first time.
>
> Build and tested for aarch64-linux-gnu with no regressions.

OK.

Richard.

>         PR target/116065
>
> gcc/ChangeLog:
>
>         * config/aarch64/aarch64.opt (mearly-ra=): Mark as Optimization rather
>         than Save.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/aarch64/sve/target_optimization-1.c: New test.
>
> Signed-off-by: Andrew Pinski <quic_apin...@quicinc.com>
> ---
>  gcc/config/aarch64/aarch64.opt                   |  2 +-
>  .../aarch64/sve/target_optimization-1.c          | 16 ++++++++++++++++
>  2 files changed, 17 insertions(+), 1 deletion(-)
>  create mode 100644 
> gcc/testsuite/gcc.target/aarch64/sve/target_optimization-1.c
>
> diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
> index 2f90f10352a..6229bcb371e 100644
> --- a/gcc/config/aarch64/aarch64.opt
> +++ b/gcc/config/aarch64/aarch64.opt
> @@ -256,7 +256,7 @@ EnumValue
>  Enum(early_ra_scope) String(none) Value(AARCH64_EARLY_RA_NONE)
>
>  mearly-ra=
> -Target RejectNegative Joined Enum(early_ra_scope) Var(aarch64_early_ra) 
> Init(AARCH64_EARLY_RA_NONE) Save
> +Target RejectNegative Joined Enum(early_ra_scope) Var(aarch64_early_ra) 
> Init(AARCH64_EARLY_RA_NONE) Optimization
>  Specify when to enable an early register allocation pass.  The possibilities
>  are: all functions, functions that have access to strided multi-register
>  instructions, and no functions.
> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/target_optimization-1.c 
> b/gcc/testsuite/gcc.target/aarch64/sve/target_optimization-1.c
> new file mode 100644
> index 00000000000..3010f0c4189
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/aarch64/sve/target_optimization-1.c
> @@ -0,0 +1,16 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O1" } */
> +
> +#include <arm_sve.h>
> +
> +/* Turn off SVE overall */
> +#pragma GCC target("+nosve")
> +
> +/* But the function turns it on again so it should work.
> +   Even if changing the optimization level from O1 to O2. */
> +int __attribute__((target ("+sve"), optimize(2)))
> +bar (void)
> +{
> +  svfloat32_t xseg;
> +  return svlen_f32(xseg);
> +}
> --
> 2.43.0
>

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