On 7/20/24 11:27 AM, Georg-Johann Lay wrote:
Hi Jeff,
at least combiner patterns won't work. For something like
var |= 1 << (off & 7)
insn combine is just getting lost; it tries expressions with
MEM, IOR, even PARALLELs, but nothing that's close to a rotation.
Also it doesn't break out memory regerences (presumably because it
has no scratch reg available). It is getting even worse for
I just added these to the RISC-V backend a few weeks back using combiner
patterns.
var &= ~ (1 << (off & 7))
avr.md has rotlqi3 but no tries are ever made to emit
something like rotl (1, off) or rotr (0x80, off).
It may be a case that generating them in QImode isn't happening for one
reason or another. C semantics will often force things to an integer
type which is exceedingly painful on the riscv64 port.
jeff
