On Thu, Jun 21, 2012 at 12:08:42PM -0400, David Edelsohn wrote:
> 4) Later loads and stores to which a dependency is carried from the
> initial load (see 1.10p9 and 1.10p10 in the standard) cannot be
> reordered to precede the load(memory_order_consume). Other loads and
> stores following the load(memory_order_consume) may be freely
> reordered to precede the load(memory_order_consume).
>
> A relaxed load is subject to constraints #1-#3 above, but not #4. In
> contrast, a memory_order_acquire load would be subject to #1-3 above,
> but would be subject to a stronger version of #4 that prohibited -any-
> load or store following the load(memory_order_consume) to be reordered
> prior to that load(memory_order_consume).
>
>
> The isync is not technically required, but removing it requires subtle
> load-store tracking conformance from the compiler and library. We
> left it in to be safe. I'm curious about Richard and Jakub's current
> thoughts.
Hmm, OK. So, let me see if I understand. We know
p = atomic_load_n (addr, __ATOMIC_CONSUME);
i = *p;
needs no barriers on powerpc. But if we had something like
p = atomic_load_n (addr, __ATOMIC_CONSUME);
if (p == &foo)
{
i = *p;
...
}
and the compiler optimised "i = *p" to "i = foo", then you'd be in
trouble because the hardware won't see the load from "foo" having any
dependency on p.
--
Alan Modra
Australia Development Lab, IBM
