As reported in PR 115554 and PR 115562, the current RISC-V target attribute handling code suffers from ICEs for legal inputs. An analysis of the code revealed deficits in the way target arch attributes are stored in the backend. This series attempts to address these issues.
The first four commit are independent code cleanups that don't introduce new functionality. Patch five is the rewrite of the code that stores arch attributes. And patch six ensures enabled extensions may be added via arch attributes, giving them an accumulation semantics. Each patch of the series has been regression tested (rv32+rv64). Further, the series has been build with --enable-werror-always to ensure no new build warnings. Note, that patch 5 introduces six regression, which are addressed by patch 6 (the commit message lists them). This rewrite was motivited by issues that were discovered while analysing a build issue with a patchset to introduce optimized string processing routines for RISC-V in glibc. See also: https://sourceware.org/pipermail/libc-alpha/2024-June/157627.html Christoph Müllner (6): RISC-V: testsuite: Properly gate LTO tests RISC-V: Deduplicate arch subset list processing RISC-V: Attribute parser: Use alloca() instead of new + std::unique_ptr RISC-V: Fix comment/naming in attribute parsing code RISC-V: Rewrite target attribute handling RISC-V: Allow adding enabled extension via target arch attributes gcc/common/config/riscv/riscv-common.cc | 160 +++--------------- gcc/config/riscv/riscv-c.cc | 2 +- gcc/config/riscv/riscv-subset.h | 9 +- gcc/config/riscv/riscv-target-attr.cc | 122 +++++++------ gcc/config/riscv/riscv.cc | 22 ++- gcc/config/riscv/riscv.opt | 2 +- .../gcc.target/riscv/interrupt-misaligned.c | 2 +- gcc/testsuite/gcc.target/riscv/pr115554.c | 11 ++ gcc/testsuite/gcc.target/riscv/pr115562.c | 25 +++ gcc/testsuite/gcc.target/riscv/pr93202.c | 2 +- .../gcc.target/riscv/target-attr-01.c | 16 +- .../gcc.target/riscv/target-attr-02.c | 16 +- .../gcc.target/riscv/target-attr-03.c | 11 +- .../gcc.target/riscv/target-attr-04.c | 11 +- .../gcc.target/riscv/target-attr-05.c | 10 +- .../gcc.target/riscv/target-attr-06.c | 11 +- .../gcc.target/riscv/target-attr-07.c | 10 +- .../gcc.target/riscv/target-attr-08.c | 20 +++ .../gcc.target/riscv/target-attr-09.c | 19 +++ .../gcc.target/riscv/target-attr-10.c | 19 +++ .../gcc.target/riscv/target-attr-11.c | 22 +++ .../gcc.target/riscv/target-attr-12.c | 21 +++ .../gcc.target/riscv/target-attr-13.c | 21 +++ .../gcc.target/riscv/target-attr-14.c | 42 +++++ .../gcc.target/riscv/target-attr-15.c | 42 +++++ .../gcc.target/riscv/target-attr-16.c | 26 +++ 26 files changed, 428 insertions(+), 246 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/pr115554.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr115562.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-08.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-09.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/target-attr-16.c -- 2.45.2
