> >
> > gcc/testsuite/ChangeLog
> >         * gcc.target/i386/pr100711-6.c: Update to check for decimal
> >         immediate operand in ternlog, not hexadecimal.
> I got an ICE when bootstrapped with --enable-checking=yes,rtl,extra
>

The ICE can be walked around with 2 separate define_predicates, one
with (and,ior,xor), the other with not.

.i.e.
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index bd7411190af..83055c1af5e 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -21420,7 +21420,8 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
          || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256)))
       && GET_MODE_SIZE (mode) >= 16
       && outer_code_i == SET
-      && ternlog_operand (x, mode))
+      && (ternlog_operand_0 (x, mode)
+         || ternlog_operand_1 (x, mode)))
     {
       rtx args[3];

diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index a894847adaf..da20905cd1b 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1104,8 +1104,14 @@ (define_predicate "regmem_or_bitnot_regmem_operand"
            (match_test "nonimmediate_operand (XEXP (op, 0), mode)"))))

 ;; True for expressions valid for 3-operand ternlog instructions.
-(define_predicate "ternlog_operand"
-  (and (match_code "not,and,ior,xor")
+;; Split ternlog_operand into ternlog_operand_{1,2} to avoid ICE when
+;; enabling rtl check.
+(define_predicate "ternlog_operand_0"
+  (and (match_code "and,ior,xor")
+       (match_test "ix86_ternlog_operand_p (op)")))
+
+(define_predicate "ternlog_operand_1"
+  (and (match_code "not")
        (match_test "ix86_ternlog_operand_p (op)")))

 ;; True if OP is acceptable as operand of DImode shift expander.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 4da15be8d40..2d050fc06e3 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -13383,7 +13383,27 @@ (define_split

 (define_insn_and_split "*<avx512>_vpternlog<mode>_0"
   [(set (match_operand:V 0 "register_operand")
-       (match_operand:V 1 "ternlog_operand"))]
+       (match_operand:V 1 "ternlog_operand_0"))]
+  "(<MODE_SIZE> == 64 || TARGET_AVX512VL
+    || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+{
+  rtx args[3];
+  args[0] = NULL_RTX;
+  args[1] = NULL_RTX;
+  args[2] = NULL_RTX;
+  int idx = ix86_ternlog_idx (operands[1], args);
+  ix86_expand_ternlog (<MODE>mode, args[0], args[1], args[2], idx,
+                      operands[0]);
+  DONE;
+})
+
+(define_insn_and_split "*<avx512>_vpternlog<mode>_1"
+  [(set (match_operand:V 0 "register_operand")
+       (match_operand:V 1 "ternlog_operand_1"))]
   "(<MODE_SIZE> == 64 || TARGET_AVX512VL
     || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
    && ix86_pre_reload_split ()"


-- 
BR,
Hongtao

Reply via email to