Re: [PATCH] RISC-V: use fclass insns to implement isfinite and isnormal builtins

[Xi Ruoyao]

On Fri, 2024-06-28 at 17:53 -0700, Vineet Gupta wrote:
> +  UNSPEC_ISFINITE
> +  UNSPEC_ISNORMAL

You don't really need them.  The RTL pattern of define_expand has no use
when you expand it via C code and DONE.

i.e. you can just code

(define_expand "isfinite<ANYF:mode>2"
  [(match_operand:SI   0 "register_operand" "=r")
   (match_operand:ANYF 1 "register_operand" " f")]
  "TARGET_HARD_FLOAT"
{
  rtx tmp = gen_reg_rtx (SImode);
  emit_insn (gen_fclass<ANYF:mode> (tmp, operands[1]));
  riscv_emit_binary (AND, tmp, tmp, GEN_INT (0x7e));
  rtx cmp = gen_rtx_NE (SImode, tmp, const0_rtx);
  emit_insn (gen_cstoresi4 (operands[0], cmp, tmp, const0_rtx));

  DONE;
})

and remove the necessity of UNSPEC_ISFINITE.

-- 
Xi Ruoyao <xry...@xry111.site>
School of Aerospace Science and Technology, Xidian University