On Thu, Jun 13, 2024 at 3:44 AM Hongyu Wang <wwwhhhyyy...@gmail.com> wrote:
>
> Thanks for the advice, updated patch in attachment.
>
> Bootstrapped/regtested on x86-64-pc-linux-gnu. Ok for trunk?
>
> Uros Bizjak <ubiz...@gmail.com> 于2024年6月12日周三 18:12写道：
> >
> > On Wed, Jun 12, 2024 at 12:00 PM Uros Bizjak <ubiz...@gmail.com> wrote:
> > >
> > > On Wed, Jun 12, 2024 at 5:12 AM Hongyu Wang <hongyu.w...@intel.com> wrote:
> > > >
> > > > Hi,
> > > >
> > > > For CTEST, we don't have conditional AND so there's no optimization
> > > > opportunity to write a new ctest pattern. Emit ctest when ccmp did
> > > > comparison to const 0 to save bytes.
> > > >
> > > > Bootstrapped & regtested under x86-64-pc-linux-gnu.
> > > >
> > > > Ok for trunk?
> > > >
> > > > gcc/ChangeLog:
> > > >
> > > > * config/i386/i386.md (@ccmp<mode>): Use ctestcc when
> > > > operands[3] is const0_rtx.
> > > >
> > > > gcc/testsuite/ChangeLog:
> > > >
> > > > * gcc.target/i386/apx-ccmp-1.c: Adjust output to scan ctest.
> > > > * gcc.target/i386/apx-ccmp-2.c: Adjust some condition to
> > > > compare with 0.
LGTM.
+ (minus:SWI (match_operand:SWI 2 "nonimmediate_operand" "<r>,<r>m,<r>")
+ (match_operand:SWI 3 "<general_operand>" "C,<r><i>,<r><m>"))
Perhaps the constraint can be slightly optimized to avoid repeating
(<r>,<r>) pairs.
"<r>,<r>m ,<r>"
"C ,<r><i>,<m>"
Uros.
> > > > ---
> > > > gcc/config/i386/i386.md | 6 +++++-
> > > > gcc/testsuite/gcc.target/i386/apx-ccmp-1.c | 10 ++++++----
> > > > gcc/testsuite/gcc.target/i386/apx-ccmp-2.c | 4 ++--
> > > > 3 files changed, 13 insertions(+), 7 deletions(-)
> > > >
> > > > diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
> > > > index a64f2ad4f5f..014d48cddd6 100644
> > > > --- a/gcc/config/i386/i386.md
> > > > +++ b/gcc/config/i386/i386.md
> > > > @@ -1522,7 +1522,11 @@ (define_insn "@ccmp<mode>"
> > > > [(match_operand:SI 4 "const_0_to_15_operand")]
> > > > UNSPEC_APX_DFV)))]
> > > > "TARGET_APX_CCMP"
> > > > - "ccmp%C1{<imodesuffix>}\t%G4 {%3, %2|%2, %3}"
> > > > + {
> > > > + if (operands[3] == const0_rtx && !MEM_P (operands[2]))
> > > > + return "ctest%C1{<imodesuffix>}\t%G4 %2, %2";
> > > > + return "ccmp%C1{<imodesuffix>}\t%G4 {%3, %2|%2, %3}";
> > > > + }
> > >
> > > This could be implemented as an alternative using "r,C" constraint as
> > > the first constraint for operands[2,3]. Then the register allocator
> > > will match the constraints for you.
> >
> > Like in the attached (lightly tested) patch.
> >
> > Uros.
