[PATCH V4 2/2] split complicate 64bit to constant pool under -m32 -mpowerpc64

[Jiufu Guo]

Hi,

For "-m32 -mpowerpc64", it is also ok to use just one instruciton (p?ld)
to loading 64bit constant from memory. So, splitting the complicate 64bit
constant to constant pool should also work under this case.

Bootstrap and regtest pass on ppc64{,le}.
Also no regression for "-m32 -mpowerpc64" variation on ppc64.
Is this ok for trunk?


BR,
Jeff(Jiufu) Guo

gcc/ChangeLog:

        * config/rs6000/rs6000.cc (rs6000_emit_set_const): Support splitting
        constant to pool for "-m32 -mpowerpc64".

gcc/testsuite/ChangeLog:

        * gcc.target/powerpc/pr63281.c: Update target checking.

---
 gcc/config/rs6000/rs6000.cc                | 22 ++++++++++++++++++++--
 gcc/testsuite/gcc.target/powerpc/pr63281.c |  4 ++--
 2 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index f448df289a0..54514d16fea 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -10241,8 +10241,8 @@ rs6000_emit_set_const (rtx dest, rtx source)
          emit_move_insn (lo, GEN_INT (c));
        }
 
-      else if (base_reg_operand (dest, mode) && TARGET_64BIT
-              && TARGET_ELF && num_insns_constant (source, mode) > 2)
+      else if (base_reg_operand (dest, mode) && TARGET_ELF
+              && num_insns_constant (source, mode) > 2)
        {
          rtx sym = force_const_mem (mode, source);
          if (TARGET_TOC && SYMBOL_REF_P (XEXP (sym, 0))
@@ -10252,6 +10252,24 @@ rs6000_emit_set_const (rtx dest, rtx source)
              sym = gen_const_mem (mode, toc);
              set_mem_alias_set (sym, get_TOC_alias_set ());
            }
+         else if (TARGET_32BIT)
+           {
+             /* After RA, reuse 'DEST' reg.  */
+             rtx addr = can_create_pseudo_p ()
+                          ? gen_reg_rtx (Pmode)
+                          : gen_rtx_REG (Pmode, REGNO (dest));
+             rtx sym_ref = XEXP (sym, 0);
+             if (flag_pic)
+               emit_move_insn (addr, sym_ref);
+             else
+               {
+                 emit_insn (gen_elf_high (addr, sym_ref));
+                 emit_move_insn (addr, gen_rtx_LO_SUM (Pmode, addr, sym_ref));
+               }
+             rtx mem = gen_rtx_MEM (mode, addr);
+             MEM_COPY_ATTRIBUTES (mem, sym);
+             sym = mem;
+           }
 
          emit_move_insn (dest, sym);
        }
diff --git a/gcc/testsuite/gcc.target/powerpc/pr63281.c 
b/gcc/testsuite/gcc.target/powerpc/pr63281.c
index 9763a7181fc..d3d620d3bee 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr63281.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr63281.c
@@ -1,4 +1,4 @@
-/* Check loading constant from memory pool.  */
+/* Check loading constant from memory pool under -mpowerpc64 (also ok for 
-m32).  */
 /* { dg-options "-O2 -mpowerpc64" } */
 
 void
@@ -7,5 +7,5 @@ foo (unsigned long long *a)
   *a++ = 0x2351847027482577ULL;
 }
 
-/* { dg-final { scan-assembler-times {\mp?ld\M} 1 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times {\mp?ld\M} 1 { target { has_arch_ppc64 } 
} } } */
 
-- 
2.45.1