LGTM from RISC-V, thanks :)
On Mon, Jun 3, 2024 at 11:08 AM Kewen Lin <li...@linux.ibm.com> wrote:
>
> This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE
> defines in riscv port, and add new port specific hook
> implementation riscv_c_mode_for_floating_type.
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_c_mode_for_floating_type): New
> function.
> (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
> * config/riscv/riscv.h (FLOAT_TYPE_SIZE): Remove.
> (DOUBLE_TYPE_SIZE): Likewise.
> (LONG_DOUBLE_TYPE_SIZE): Likewise.
> ---
> gcc/config/riscv/riscv.cc | 15 +++++++++++++++
> gcc/config/riscv/riscv.h | 4 ----
> 2 files changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 92935275aaa..b011344cabe 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -11449,6 +11449,18 @@ riscv_expand_usadd (rtx dest, rtx x, rtx y)
> emit_move_insn (dest, gen_lowpart (mode, xmode_dest));
> }
>
> +/* Implement TARGET_C_MODE_FOR_FLOATING_TYPE. Return TFmode for
> + TI_LONG_DOUBLE_TYPE which is for long double type, go with the
> + default one for the others. */
> +
> +static machine_mode
> +riscv_c_mode_for_floating_type (enum tree_index ti)
> +{
> + if (ti == TI_LONG_DOUBLE_TYPE)
> + return TFmode;
> + return default_mode_for_floating_type (ti);
> +}
> +
> /* Initialize the GCC target structure. */
> #undef TARGET_ASM_ALIGNED_HI_OP
> #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
> @@ -11804,6 +11816,9 @@ riscv_expand_usadd (rtx dest, rtx x, rtx y)
> #undef TARGET_GET_RAW_RESULT_MODE
> #define TARGET_GET_RAW_RESULT_MODE riscv_get_raw_result_mode
>
> +#undef TARGET_C_MODE_FOR_FLOATING_TYPE
> +#define TARGET_C_MODE_FOR_FLOATING_TYPE riscv_c_mode_for_floating_type
> +
> struct gcc_target targetm = TARGET_INITIALIZER;
>
> #include "gt-riscv.h"
> diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
> index d6b14c4d620..83c4677c6a1 100644
> --- a/gcc/config/riscv/riscv.h
> +++ b/gcc/config/riscv/riscv.h
> @@ -188,10 +188,6 @@ ASM_MISA_SPEC
> #define POINTER_SIZE (riscv_abi >= ABI_LP64 ? 64 : 32)
> #define LONG_TYPE_SIZE POINTER_SIZE
>
> -#define FLOAT_TYPE_SIZE 32
> -#define DOUBLE_TYPE_SIZE 64
> -#define LONG_DOUBLE_TYPE_SIZE 128
> -
> /* Allocation boundary (in *bits*) for storing arguments in argument list.
> */
> #define PARM_BOUNDARY BITS_PER_WORD
>
> --
> 2.43.0
>
