cpymemsi expansion was available for RISC-V since the initial port.
However, there are not tests to detect regression.
This patch adds such tests.
Three of the tests target the expansion requirements (known length and
alignment). One test reuses an existing memcpy test from the by-pieces
framework (gcc/testsuite/gcc.dg/torture/inline-mem-cpy-1.c).
gcc/testsuite/ChangeLog:
* gcc.target/riscv/cpymemsi-1.c: New test.
* gcc.target/riscv/cpymemsi-2.c: New test.
* gcc.target/riscv/cpymemsi-3.c: New test.
* gcc.target/riscv/cpymemsi.c: New test.
Signed-off-by: Christoph Müllner <christoph.muell...@vrull.eu>
---
gcc/testsuite/gcc.target/riscv/cpymemsi-1.c | 9 +++++
gcc/testsuite/gcc.target/riscv/cpymemsi-2.c | 42 ++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/cpymemsi-3.c | 43 +++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/cpymemsi.c | 22 +++++++++++
4 files changed, 116 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/cpymemsi-1.c
create mode 100644 gcc/testsuite/gcc.target/riscv/cpymemsi-2.c
create mode 100644 gcc/testsuite/gcc.target/riscv/cpymemsi-3.c
create mode 100644 gcc/testsuite/gcc.target/riscv/cpymemsi.c
diff --git a/gcc/testsuite/gcc.target/riscv/cpymemsi-1.c
b/gcc/testsuite/gcc.target/riscv/cpymemsi-1.c
new file mode 100644
index 00000000000..983b564ccaf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cpymemsi-1.c
@@ -0,0 +1,9 @@
+/* { dg-do run } */
+/* { dg-options "-march=rv32gc -save-temps -g0 -fno-lto" { target { rv32 } } }
*/
+/* { dg-options "-march=rv64gc -save-temps -g0 -fno-lto" { target { rv64 } } }
*/
+/* { dg-additional-options "-DRUN_FRACTION=11" { target simulator } } */
+/* { dg-timeout-factor 2 } */
+
+#include "../../gcc.dg/memcmp-1.c"
+/* Yeah, this memcmp test exercises plenty of memcpy, more than any of the
+ memcpy tests. */
diff --git a/gcc/testsuite/gcc.target/riscv/cpymemsi-2.c
b/gcc/testsuite/gcc.target/riscv/cpymemsi-2.c
new file mode 100644
index 00000000000..833d1c04487
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cpymemsi-2.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc" { target { rv32 } } } */
+/* { dg-options "-march=rv64gc" { target { rv64 } } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
+
+#include <stddef.h>
+#define aligned32 __attribute__ ((aligned (32)))
+
+const char myconst15[] aligned32 = { 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7 };
+const char myconst23[] aligned32 = { 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7 };
+const char myconst31[] aligned32 = { 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7 };
+
+/* No expansion (unknown alignment) */
+#define MY_MEM_CPY_N(N) \
+void my_mem_cpy_##N (char *b1, const char *b2) \
+{ \
+ __builtin_memcpy (b1, b2, N); \
+}
+
+/* No expansion (unknown alignment) */
+#define MY_MEM_CPY_CONST_N(N) \
+void my_mem_cpy_const_##N (char *b1) \
+{ \
+ __builtin_memcpy (b1, myconst##N, sizeof(myconst##N));\
+}
+
+MY_MEM_CPY_N(15)
+MY_MEM_CPY_CONST_N(15)
+
+MY_MEM_CPY_N(23)
+MY_MEM_CPY_CONST_N(23)
+
+MY_MEM_CPY_N(31)
+MY_MEM_CPY_CONST_N(31)
+
+/* { dg-final { scan-assembler-times "\t(call|tail)\tmemcpy" 6 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cpymemsi-3.c
b/gcc/testsuite/gcc.target/riscv/cpymemsi-3.c
new file mode 100644
index 00000000000..803765195b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cpymemsi-3.c
@@ -0,0 +1,43 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc" { target { rv32 } } } */
+/* { dg-options "-march=rv64gc" { target { rv64 } } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
+
+#include <stddef.h>
+#define aligned32 __attribute__ ((aligned (32)))
+
+const char myconst15[] aligned32 = { 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7 };
+const char myconst23[] aligned32 = { 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7 };
+const char myconst31[] aligned32 = { 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7,
+ 0, 1, 2, 3, 4, 5, 6, 7 };
+
+#define MY_MEM_CPY_ALIGNED_N(N) \
+void my_mem_cpy_aligned_##N(char *b1, const char *b2) \
+{ \
+ b1 = __builtin_assume_aligned (b1, 4096); \
+ b2 = __builtin_assume_aligned (b2, 4096); \
+ __builtin_memcpy (b1, b2, N); \
+}
+
+#define MY_MEM_CPY_ALIGNED_CONST_N(N) \
+void my_mem_cpy_aligned_const_##N(char *b1) \
+{ \
+ b1 = __builtin_assume_aligned (b1, 4096); \
+ __builtin_memcpy (b1, myconst##N, sizeof(myconst##N)); \
+}
+
+MY_MEM_CPY_ALIGNED_N(15)
+MY_MEM_CPY_ALIGNED_CONST_N(15)
+
+MY_MEM_CPY_ALIGNED_N(23)
+MY_MEM_CPY_ALIGNED_CONST_N(23)
+
+MY_MEM_CPY_ALIGNED_N(31)
+MY_MEM_CPY_ALIGNED_CONST_N(31)
+
+/* { dg-final { scan-assembler-not "\t(call|tail)\tmemcpy" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cpymemsi.c
b/gcc/testsuite/gcc.target/riscv/cpymemsi.c
new file mode 100644
index 00000000000..d27a488c8ed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/cpymemsi.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc" { target { rv32 } } } */
+/* { dg-options "-march=rv64gc" { target { rv64 } } } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" "-Oz" } } */
+
+#include <stddef.h>
+
+/* No expansion (unknown size) */
+void my_mem_cpy_n(char *b1, const char *b2, size_t n)
+{
+ __builtin_memcpy (b1, b2, n);
+}
+
+/* No expansion (unknown size) */
+void my_mem_cpy_aligned(char *b1, const char *b2, size_t n)
+{
+ b1 = __builtin_assume_aligned (b1, 4096);
+ b2 = __builtin_assume_aligned (b2, 4096);
+ __builtin_memcpy (b1, b2, n);
+}
+
+/* { dg-final { scan-assembler-times "\t(call|tail)\tmemcpy" 2 } } */
--
2.44.0
