Hi,
on 2024/2/21 01:57, Carl Love wrote:
> GCC maintainers:
>
> The patch adds test cases for the vec_cmpne of built-ins.
>
> The patch has been tested on Power 10 with no regressions.
>
> Please let me know if this patch is acceptable for mainline. Thanks.
>
> Carl
> ------------------------------------------------------------
> rs6000, add test cases for the vec_cmpne built-ins
The subject and this subject line are saying "vec_cmpne" ...
>
> Add test cases for the signed int, unsigned it, signed short, unsigned
> short, signed char and unsigned char built-ins.
>
> Note, the built-ins are documented in the Power Vector Instrinsic
> Programing reference manual.
>
> gcc/testsuite/ChangeLog:
> * gcc.target/powerpc/vec-cmple.c: New test case.
> * gcc.target/powerpc/vec-cmple.h: New test case include file.
... But I think you meant "vec_cmple".
> ---
> gcc/testsuite/gcc.target/powerpc/vec-cmple.c | 35 ++++++++
> gcc/testsuite/gcc.target/powerpc/vec-cmple.h | 84 ++++++++++++++++++++
> 2 files changed, 119 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-cmple.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-cmple.h
>
> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cmple.c
> b/gcc/testsuite/gcc.target/powerpc/vec-cmple.c
> new file mode 100644
> index 00000000000..766a1c770e2
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/vec-cmple.c
> @@ -0,0 +1,35 @@
> +/* { dg-do run } */
> +/* { dg-require-effective-target powerpc_altivec_ok } */
Should be "vmx_hw" for run test.
> +/* { dg-options "-maltivec -O2" } */
> +
> +/* Test that the vec_cmpne builtin generates the expected Altivec
> + instructions. */
It seems this file was copied from vec-cmpne.c? As we have
vec-cmpne-runnable.c, maybe we can rename it to vec-cmple-runnable.c.
And previously since we have vec-cmpne-runnable.c and vec-cmpne.c
to use vec-cmpne.h, so a header was introduced. If you just want to
add one runnable test case, maybe just inline vec-cmple.h since
it's not used by others at all.
BR,
Kewen
> +
> +#include "vec-cmple.h"
> +
> +int main ()
> +{
> + /* Note macro expansions for "signed long long int" and
> + "unsigned long long int" do not work for the vec_vsx_ld builtin. */
> + define_test_functions (int, signed int, signed int, si);
> + define_test_functions (int, unsigned int, unsigned int, ui);
> + define_test_functions (short, signed short, signed short, ss);
> + define_test_functions (short, unsigned short, unsigned short, us);
> + define_test_functions (char, signed char, signed char, sc);
> + define_test_functions (char, unsigned char, unsigned char, uc);
> +
> + define_init_verify_functions (int, signed int, signed int, si);
> + define_init_verify_functions (int, unsigned int, unsigned int, ui);
> + define_init_verify_functions (short, signed short, signed short, ss);
> + define_init_verify_functions (short, unsigned short, unsigned short, us);
> + define_init_verify_functions (char, signed char, signed char, sc);
> + define_init_verify_functions (char, unsigned char, unsigned char, uc);
> +
> + execute_test_functions (int, signed int, signed int, si);
> + execute_test_functions (int, unsigned int, unsigned int, ui);
> + execute_test_functions (short, signed short, signed short, ss);
> + execute_test_functions (short, unsigned short, unsigned short, us);
> + execute_test_functions (char, signed char, signed char, sc);
> + execute_test_functions (char, unsigned char, unsigned char, uc);
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cmple.h
> b/gcc/testsuite/gcc.target/powerpc/vec-cmple.h
> new file mode 100644
> index 00000000000..4126706b99a
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/vec-cmple.h
> @@ -0,0 +1,84 @@
> +#include "altivec.h"
> +
> +#define N 4096
> +
> +#include <stdio.h>
> +void abort ();
> +
> +#define PRAGMA(X) _Pragma (#X)
> +#define UNROLL0 PRAGMA (GCC unroll 0)
> +
> +#define define_test_functions(VBTYPE, RTYPE, STYPE, NAME) \
> +\
> +RTYPE result_le_##NAME[N] __attribute__((aligned(16))); \
> +STYPE operand1_##NAME[N] __attribute__((aligned(16))); \
> +STYPE operand2_##NAME[N] __attribute__((aligned(16))); \
> +RTYPE expected_##NAME[N] __attribute__((aligned(16))); \
> +\
> +__attribute__((noinline)) void vector_tests_##NAME () \
> +{ \
> + vector STYPE v1_##NAME, v2_##NAME; \
> + vector bool VBTYPE tmp_##NAME; \
> + int i; \
> + UNROLL0 \
> + for (i = 0; i < N; i+=16/sizeof (STYPE)) \
> + { \
> + /* result_le = operand1!=operand2. */ \
> + v1_##NAME = vec_vsx_ld (0, (const vector STYPE*)&operand1_##NAME[i]); \
> + v2_##NAME = vec_vsx_ld (0, (const vector STYPE*)&operand2_##NAME[i]); \
> +\
> + tmp_##NAME = vec_cmple (v1_##NAME, v2_##NAME); \
> + vec_vsx_st (tmp_##NAME, 0, &result_le_##NAME[i]); \
> + } \
> +}
> +
> +#define define_init_verify_functions(VBTYPE, RTYPE, STYPE, NAME) \
> +__attribute__((noinline)) void init_##NAME () \
> +{ \
> + int i; \
> + for (i = 0; i < N; ++i) \
> + { \
> + result_le_##NAME[i] = 7; \
> + if (i%3 == 0) \
> + { \
> + /* op1 < op2. */ \
> + operand1_##NAME[i] = 1; \
> + operand2_##NAME[i] = 2; \
> + } \
> + else if (i%3 == 1) \
> + { \
> + /* op1 > op2. */ \
> + operand1_##NAME[i] = 2; \
> + operand2_##NAME[i] = 1; \
> + } \
> + else if (i%3 == 2) \
> + { \
> + /* op1 == op2. */ \
> + operand1_##NAME[i] = 3; \
> + operand2_##NAME[i] = 3; \
> + } \
> + /* For vector comparisons: "For each element of the result_le, the \
> + value of each bit is 1 if the corresponding elements of ARG1 and \
> + ARG2 are equal." {or whatever the comparison is} "Otherwise, the \
> + value of each bit is 0." */ \
> + expected_##NAME[i] = -1 * (RTYPE)(operand1_##NAME[i] <=
> operand2_##NAME[i]); \
> + } \
> +} \
> +\
> +__attribute__((noinline)) void verify_results_##NAME () \
> +{ \
> + int i; \
> + for (i = 0; i < N; ++i) \
> + { \
> + if ( (result_le_##NAME[i] != expected_##NAME[i]) ) \
> + abort(); \
> + } \
> +}
> +
> +#define execute_test_functions(VBTYPE, RTYPE, STYPE, NAME) \
> +{ \
> + init_##NAME (); \
> + vector_tests_##NAME (); \
> + verify_results_##NAME (); \
> +}
> +
