This patch makes __aarch64_sync_cache_range a LIB2ADD and removes it
from lib1funcs.S. Since it is the only function in lib1funcs.S, that
file can be removed. It also changes the functionality of
__aarch64_sync_cache_range to use userland instructions instead of an
exception.
This should be applied after the patch I suggested for t-aarch64:
http://gcc.gnu.org/ml/gcc-patches/2012-05/msg01884.html.
Additions to libgcc/ChangeLog:
2012-05-31 Jim MacArthur<jim.macart...@arm.com>
* config.host (aarch64*-*-elf): Add t-aarch64.
(aarch64*-*-linux*): Add t-aarch64, remove t-linux.
* config/aarch64/lib1funcs.S: Delete.
* config/aarch64/sync-cache.S: New file.
* config/aarch64/t-aarch64: New file.
* config/aarch64/t-linux: Delete.
diff --git a/libgcc/config.host b/libgcc/config.host
index 56beddd..5a05c93 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -291,14 +291,15 @@ case ${host} in
;;
aarch64*-*-elf)
extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o"
+ tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp"
;;
aarch64*-*-linux*)
md_unwind_header=aarch64/linux-unwind.h
+ tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} t-softfp-sfdf t-softfp-excl"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp"
- tmake_file="${tmake_file} ${cpu_type}/t-linux"
;;
alpha*-*-linux*)
tmake_file="${tmake_file} alpha/t-alpha alpha/t-ieee t-crtfm
alpha/t-linux"
diff --git a/libgcc/config/aarch64/lib1funcs.S
b/libgcc/config/aarch64/lib1funcs.S
deleted file mode 100644
index 5123609..0000000
--- a/libgcc/config/aarch64/lib1funcs.S
+++ /dev/null
@@ -1,73 +0,0 @@
-/* libgcc routines for AArch64
-
- Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
- Contributed by ARM Ltd.
-
- This file is free software; you can redistribute it and/or modify it
- under the terms of the GNU General Public License as published by the
- Free Software Foundation; either version 3, or (at your option) any
- later version.
-
- This file is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- Under Section 7 of GPL version 3, you are granted additional
- permissions described in the GCC Runtime Library Exception, version
- 3.1, as published by the Free Software Foundation.
-
- You should have received a copy of the GNU General Public License and
- a copy of the GCC Runtime Library Exception along with this program;
- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
- <http://www.gnu.org/licenses/>. */
-
-/* We need to know what prefix to add to function names. */
-
-#ifndef __USER_LABEL_PREFIX__
-#error __USER_LABEL_PREFIX__ not defined
-#endif
-
-/* ANSI concatenation macros. */
-
-#define CONCAT1(a, b) CONCAT2(a, b)
-#define CONCAT2(a, b) a ## b
-
-/* Use the right prefix for global labels. */
-
-#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
-
-#ifdef __ELF__
-#define TYPE(x) .type SYM(x),function
-#define SIZE(x) .size SYM(x), . - SYM(x)
-#define LSYM(x) .x
-#else
-#define TYPE(x)
-#define SIZE(x)
-#define LSYM(x) x
-#endif
-
-.macro FUNC_START name
- .text
- .globl SYM (__\name)
- TYPE (__\name)
- .align 2
-SYM (__\name):
-.endm
-
-.macro FUNC_END name
- SIZE (__\name)
-.endm
-
-#ifdef L_aarch64_sync_cache_range
-#if defined __linux__
- FUNC_START aarch64_sync_cache_range
- mov x3, 0
- mov x8, 0x1002
- svc 0
- RET
- FUNC_END aarch64_sync_cache_range
-#else
-#error "This is only for AARCH64 GNU/Linux"
-#endif
-#endif
\ No newline at end of file
diff --git a/libgcc/config/aarch64/t-aarch64 b/libgcc/config/aarch64/t-aarch64
new file mode 100644
index 0000000..002cb83
--- /dev/null
+++ b/libgcc/config/aarch64/t-aarch64
@@ -0,0 +1,21 @@
+# Machine description for AArch64 architecture.
+# Copyright (C) 2012 Free Software Foundation, Inc.
+# Contributed by ARM Ltd.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+LIB2ADD += $(srcdir)/config/aarch64/sync-cache.c
diff --git a/libgcc/config/aarch64/t-linux b/libgcc/config/aarch64/t-linux
deleted file mode 100644
index 30972ec..0000000
--- a/libgcc/config/aarch64/t-linux
+++ /dev/null
@@ -1,22 +0,0 @@
-# Machine description for AArch64 architecture.
-# Copyright (C) 2012 Free Software Foundation, Inc.
-# Contributed by ARM Ltd.
-#
-# This file is part of GCC.
-#
-# GCC is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3, or (at your option)
-# any later version.
-#
-# GCC is distributed in the hope that it will be useful, but
-# WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-# General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GCC; see the file COPYING3. If not see
-# <http://www.gnu.org/licenses/>.
-
-LIB1ASMSRC = aarch64/lib1funcs.S
-LIB1ASMFUNCS = _aarch64_sync_cache_range
diff --git a/libgcc/config/aarch64/sync-cache.c
b/libgcc/config/aarch64/sync-cache.c
new file mode 100644
index 0000000..428bb44
--- /dev/null
+++ b/libgcc/config/aarch64/sync-cache.c
@@ -0,0 +1,55 @@
+/* Machine description for AArch64 architecture.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ Contributed by ARM Ltd.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+void
+__aarch64_sync_cache_range (const void *base, const void *end)
+{
+ unsigned int cache_info = 0;
+
+ /* CTR_EL0 is the same as AArch32's CTR which contains log2 of the icache
size
+ in [3:0], and log2 of the dcache line in [19:16]. */
+ asm volatile ("mrs\t%0, ctr_el0":"=r" (cache_info));
+
+ unsigned int icache_lsize = 1 << (cache_info & 0xF);
+ unsigned int dcache_lsize = 1 << ((cache_info >> 16) & 0xF);
+
+ /* Loop over the address range, clearing one cache line at once.
+ Data cache must be flushed to unification first to make sure
+ the instruction cache fetches the updated data.
+ 'end' is exclusive, as per the GNU definition of __clear_cache. */
+
+ const char *address;
+ for (address = base; address < (const char *) end; address += dcache_lsize)
+ asm volatile ("dc\tcvau, %0"
+ :
+ : "r" (address)
+ : "memory");
+
+ asm volatile ("dsb\tish" : : : "memory");
+
+ for (address = base; address < (const char *) end; address += icache_lsize)
+ asm volatile ("ic\tivau, %0"
+ :
+ : "r" (address)
+ : "memory");
+
+ asm volatile ("dsb\tish; isb" : : : "memory");
+}
+
