From a46f0a775b13d77dd56f42bf4b33867302e1f12e Mon Sep 17 00:00:00 2001 From: Zac Walker Date: Wed, 3 Jan 2024 20:21:04 +0100 Subject: [PATCH] Ifdef `.hidden` and `.size` pseudo-ops for `aarch64-w64-mingw32` target Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden` and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the `.hidden` and `.size` pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__MINGW64__` define. --- libgcc/config/aarch64/__arm_sme_state.S | 2 +- libgcc/config/aarch64/__arm_tpidr2_save.S | 4 ++-- libgcc/config/aarch64/__arm_za_disable.S | 6 +++--- libgcc/config/aarch64/aarch64-asm.h | 25 +++++++++++++++++++++-- 4 files changed, 29 insertions(+), 8 deletions(-) diff --git a/libgcc/config/aarch64/__arm_sme_state.S b/libgcc/config/aarch64/__arm_sme_state.S index 0da9b585b6c..1fbb8c1ff53 100644 --- a/libgcc/config/aarch64/__arm_sme_state.S +++ b/libgcc/config/aarch64/__arm_sme_state.S @@ -30,7 +30,7 @@ - Takes no argument. - Returns SME state in x0 and TPIDR2_EL0 in x1. */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_sme_state) diff --git a/libgcc/config/aarch64/__arm_tpidr2_save.S b/libgcc/config/aarch64/__arm_tpidr2_save.S index 9135cba1ddb..2466b5863e4 100644 --- a/libgcc/config/aarch64/__arm_tpidr2_save.S +++ b/libgcc/config/aarch64/__arm_tpidr2_save.S @@ -31,7 +31,7 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) variant_pcs (__arm_tpidr2_save) @@ -97,5 +97,5 @@ END (__arm_tpidr2_save) /* Hidden alias used by __arm_za_disable. */ .global __libgcc_arm_tpidr2_save -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) .set __libgcc_arm_tpidr2_save, __arm_tpidr2_save diff --git a/libgcc/config/aarch64/__arm_za_disable.S b/libgcc/config/aarch64/__arm_za_disable.S index 5785a959e22..c372fcffe18 100644 --- a/libgcc/config/aarch64/__arm_za_disable.S +++ b/libgcc/config/aarch64/__arm_za_disable.S @@ -31,9 +31,9 @@ - Does not return a value. - Can abort on failure (then registers are not preserved). */ -.hidden __aarch64_have_sme +HIDDEN (__aarch64_have_sme) -.hidden __libgcc_arm_tpidr2_save +HIDDEN (__libgcc_arm_tpidr2_save) variant_pcs (__arm_za_disable) @@ -66,5 +66,5 @@ END (__arm_za_disable) /* Hidden alias used by the unwinder. */ .global __libgcc_arm_za_disable -.hidden __libgcc_arm_za_disable +HIDDEN (__libgcc_arm_za_disable) .set __libgcc_arm_za_disable, __arm_za_disable diff --git a/libgcc/config/aarch64/aarch64-asm.h b/libgcc/config/aarch64/aarch64-asm.h index 24568429b5c..dc7e0bc7a5c 100644 --- a/libgcc/config/aarch64/aarch64-asm.h +++ b/libgcc/config/aarch64/aarch64-asm.h @@ -83,16 +83,37 @@ GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) # endif #endif +#ifdef __MINGW64__ + #define ENTRY_ALIGN(name, align) \ .global name; \ - .type name,%function; \ .balign align; \ name: \ .cfi_startproc; \ BTI_C -#define ENTRY(name) ENTRY_ALIGN(name, 16) +#define END(name) \ + .cfi_endproc; + +/* The hidden directive is invalid for COFF targets. */ +#define HIDDEN(f) + +#else + +#define ENTRY_ALIGN(name, align) \ + .global name; \ + .type name,%function; \ + .balign align; \ + name: \ + .cfi_startproc; \ + BTI_C #define END(name) \ .cfi_endproc; \ .size name, .-name + +#define HIDDEN(f) .hidden f + +#endif + +#define ENTRY(name) ENTRY_ALIGN(name, 16) \ No newline at end of file -- 2.43.0.windows.1