Hi Andrew!
On 2023-12-13T15:46:45+0000, Andrew Stubbs <a...@codesourcery.com> wrote:
> Some AMD GCN devices support an "XNACK" mode in which the device can
> handle page-misses (and maybe other traps in memory instructions), but
> it's not completely invisible to software.
>
> We need this now to support OpenMP Unified Shared Memory (I plan to post
> updated patches for that in January), and in future it may enable
> support for APU devices (such as MI300).
>
> The first patch ensures that load instructions are "restartable",
> meaning that the outputs do not overwrite the input registers (address
> and offsets). This maps pretty much exactly to the GCC "early-clobber"
> concept, so we just need to add additional alternatives and then not
> generate problem instructions explicitly.
>
> The second patch is a workaround for the register allocation patch I
> asked about on gcc@ yesterday. The early clobber increases register
> pressure which causes compile failure when LRA is unable to spill
> additional registers without needing yet more registers. This doesn't
> become a problem on gfx90a (MI200) so soon due to the additional AVGPR
> spill registers, and that's the only device that really supports USM, so
> far, so limiting XNACK to that device will work for now.
In case that's useful (I don't know which test cases you've been looking
at) -- in GCN target testing, I've (presumably) ran into this issue here:
{+WARNING: gfortran.dg/pr92161.f -O (test for excess errors) program
timed out.+}
[-PASS:-]{+FAIL:+} gfortran.dg/pr92161.f -O (test for excess errors)
Manually reproducing, in '-march=gfx90a' testing, this disappears with
'-mxnack=off' added. Similarly for '-march=gfx908', '-march=gfx906',
'-march=gfx900', with explicit '-mxnack=on'.
Grüße
Thomas
> The -mxnack option was already added as a placeholder, so not much is
> needed there.
>
> Committed to master. An older version of these patches is already
> committed to devel/omp/gcc-13 (OG13).
>
> Andrew
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