Hi all,
This patch should be able to fix the current issue mentioned in PR112643.
Also, I fixed some legacy issues in code related to AVX512/AVX10.
Ok for trunk?
Thx,
Haochen
gcc/ChangeLog:
PR target/112643
* config/i386/driver-i386.cc (check_avx10_avx512_features):
Renamed to ...
(check_avx512_features): this and remove avx10 check.
(host_detect_local_cpu): Never append -mno-avx10.1-{256,512} to
avoid emitting warnings when building GCC with native arch.
* config/i386/i386-builtin.def (BDESC): Add missing AVX512VL for
128/256 bit builtin for AVX512VP2INTERSECT.
* config/i386/i386-options.cc (ix86_option_override_internal):
Also check whether the AVX512 flags is set when trying to reset.
* config/i386/i386.h
(PTA_SKYLAKE_AVX512): Add missing PTA_EVEX512.
(PTA_ZNVER4): Ditto.
---
gcc/config/i386/driver-i386.cc | 19 +++++++++----------
gcc/config/i386/i386-builtin.def | 8 ++++----
gcc/config/i386/i386-options.cc | 8 +++++---
gcc/config/i386/i386.h | 4 ++--
4 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
index ae67efc49c3..204600e128a 100644
--- a/gcc/config/i386/driver-i386.cc
+++ b/gcc/config/i386/driver-i386.cc
@@ -377,15 +377,10 @@ detect_caches_intel (bool xeon_mp, unsigned max_level,
enabled and the other disabled. Add this function to avoid push "-mno-"
options under this scenario for -march=native. */
-bool check_avx10_avx512_features (__processor_model &cpu_model,
- unsigned int
(&cpu_features2)[SIZE_OF_CPU_FEATURES],
- const enum processor_features feature)
+bool check_avx512_features (__processor_model &cpu_model,
+ unsigned int (&cpu_features2)[SIZE_OF_CPU_FEATURES],
+ const enum processor_features feature)
{
- if (has_feature (FEATURE_AVX512F)
- && ((feature == FEATURE_AVX10_1_256)
- || (feature == FEATURE_AVX10_1_512)))
- return false;
-
if (has_feature (FEATURE_AVX10_1_256)
&& ((feature == FEATURE_AVX512F)
|| (feature == FEATURE_AVX512CD)
@@ -900,8 +895,12 @@ const char *host_detect_local_cpu (int argc, const char
**argv)
options = concat (options, " ",
isa_names_table[i].option, NULL);
}
- else if (check_avx10_avx512_features (cpu_model, cpu_features2,
- isa_names_table[i].feature))
+ /* Never push -mno-avx10.1-{256,512} under -march=native to
+ avoid unnecessary warnings when building librarys. */
+ else if ((isa_names_table[i].feature != FEATURE_AVX10_1_256)
+ && (isa_names_table[i].feature != FEATURE_AVX10_1_512)
+ && check_avx512_features (cpu_model, cpu_features2,
+ isa_names_table[i].feature))
options = concat (options, neg_option,
isa_names_table[i].option + 2, NULL);
}
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 19fa5c107c7..7a5f2676999 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -301,10 +301,10 @@ BDESC (OPTION_MASK_ISA_AVX512BW,
OPTION_MASK_ISA2_EVEX512, CODE_FOR_avx512bw_sto
/* AVX512VP2INTERSECT */
BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT | OPTION_MASK_ISA2_EVEX512,
CODE_FOR_nothing, "__builtin_ia32_2intersectd512", IX86_BUILTIN_2INTERSECTD512,
UNKNOWN, (int) VOID_FTYPE_PUHI_PUHI_V16SI_V16SI)
BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT | OPTION_MASK_ISA2_EVEX512,
CODE_FOR_nothing, "__builtin_ia32_2intersectq512", IX86_BUILTIN_2INTERSECTQ512,
UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V8DI_V8DI)
-BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing,
"__builtin_ia32_2intersectd256", IX86_BUILTIN_2INTERSECTD256, UNKNOWN, (int)
VOID_FTYPE_PUQI_PUQI_V8SI_V8SI)
-BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing,
"__builtin_ia32_2intersectq256", IX86_BUILTIN_2INTERSECTQ256, UNKNOWN, (int)
VOID_FTYPE_PUQI_PUQI_V4DI_V4DI)
-BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing,
"__builtin_ia32_2intersectd128", IX86_BUILTIN_2INTERSECTD128, UNKNOWN, (int)
VOID_FTYPE_PUQI_PUQI_V4SI_V4SI)
-BDESC (0, OPTION_MASK_ISA2_AVX512VP2INTERSECT, CODE_FOR_nothing,
"__builtin_ia32_2intersectq128", IX86_BUILTIN_2INTERSECTQ128, UNKNOWN, (int)
VOID_FTYPE_PUQI_PUQI_V2DI_V2DI)
+BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512VP2INTERSECT,
CODE_FOR_nothing, "__builtin_ia32_2intersectd256", IX86_BUILTIN_2INTERSECTD256,
UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V8SI_V8SI)
+BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512VP2INTERSECT,
CODE_FOR_nothing, "__builtin_ia32_2intersectq256", IX86_BUILTIN_2INTERSECTQ256,
UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V4DI_V4DI)
+BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512VP2INTERSECT,
CODE_FOR_nothing, "__builtin_ia32_2intersectd128", IX86_BUILTIN_2INTERSECTD128,
UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V4SI_V4SI)
+BDESC (OPTION_MASK_ISA_AVX512VL, OPTION_MASK_ISA2_AVX512VP2INTERSECT,
CODE_FOR_nothing, "__builtin_ia32_2intersectq128", IX86_BUILTIN_2INTERSECTQ128,
UNKNOWN, (int) VOID_FTYPE_PUQI_PUQI_V2DI_V2DI)
/* AVX512VL */
BDESC (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL, 0,
CODE_FOR_avx512vl_loadv16hi_mask, "__builtin_ia32_loaddquhi256_mask",
IX86_BUILTIN_LOADDQUHI256_MASK, UNKNOWN, (int) V16HI_FTYPE_PCSHORT_V16HI_UHI)
diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
index dd5df559c84..a41bfe546b9 100644
--- a/gcc/config/i386/i386-options.cc
+++ b/gcc/config/i386/i386-options.cc
@@ -2691,10 +2691,12 @@ ix86_option_override_internal (bool main_args_p,
{
opts->x_ix86_isa_flags = (~avx512_isa_flags
& opts->x_ix86_isa_flags)
- | (avx512_isa_flags & opts->x_ix86_isa_flags_explicit);
- opts->x_ix86_isa_flags2 = (~avx512_isa_flags
+ | (avx512_isa_flags & opts->x_ix86_isa_flags
+ & opts->x_ix86_isa_flags_explicit);
+ opts->x_ix86_isa_flags2 = (~avx512_isa_flags2
& opts->x_ix86_isa_flags2)
- | (avx512_isa_flags2 & opts->x_ix86_isa_flags2_explicit);
+ | (avx512_isa_flags2 & opts->x_ix86_isa_flags2
+ & opts->x_ix86_isa_flags2_explicit);
}
}
}
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 9c74b3ebd90..47340c6a4ad 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2375,7 +2375,7 @@ constexpr wide_int_bitmask PTA_SKYLAKE = PTA_BROADWELL |
PTA_AES
| PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES | PTA_SGX;
constexpr wide_int_bitmask PTA_SKYLAKE_AVX512 = PTA_SKYLAKE | PTA_AVX512F
| PTA_AVX512CD | PTA_AVX512VL | PTA_AVX512BW | PTA_AVX512DQ | PTA_PKU
- | PTA_CLWB;
+ | PTA_CLWB | PTA_EVEX512;
constexpr wide_int_bitmask PTA_CASCADELAKE = PTA_SKYLAKE_AVX512
| PTA_AVX512VNNI;
constexpr wide_int_bitmask PTA_COOPERLAKE = PTA_CASCADELAKE | PTA_AVX512BF16;
@@ -2441,7 +2441,7 @@ constexpr wide_int_bitmask PTA_ZNVER3 = PTA_ZNVER2 |
PTA_VAES | PTA_VPCLMULQDQ
constexpr wide_int_bitmask PTA_ZNVER4 = PTA_ZNVER3 | PTA_AVX512F | PTA_AVX512DQ
| PTA_AVX512IFMA | PTA_AVX512CD | PTA_AVX512BW | PTA_AVX512VL
| PTA_AVX512BF16 | PTA_AVX512VBMI | PTA_AVX512VBMI2 | PTA_GFNI
- | PTA_AVX512VNNI | PTA_AVX512BITALG | PTA_AVX512VPOPCNTDQ;
+ | PTA_AVX512VNNI | PTA_AVX512BITALG | PTA_AVX512VPOPCNTDQ | PTA_EVEX512;
constexpr wide_int_bitmask PTA_LUJIAZUI = PTA_64BIT | PTA_MMX | PTA_SSE |
PTA_SSE2
| PTA_SSE3 | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 |
PTA_AES
--
2.31.1
