On Sun, 2023-11-19 at 19:51 -0700, Jeff Law wrote: > > On 11/19/23 18:22, Oleg Endo wrote: > > > > On Sun, 2023-11-19 at 17:47 -0700, Jeff Law wrote: > > > This is work originally started by Joern @ Embecosm. > > > > > > There's been a long standing sense that we're generating too many > > > sign/zero extensions on the RISC-V port. REE is useful, but it's really > > > focused on a relatively narrow part of the extension problem. > > > > > > What Joern's patch does is introduce a new pass which tracks liveness of > > > chunks of pseudo regs. Specifically it tracks bits 0..7, 8..15, 16..31 > > > and 32..63. > > > > > > If it encounters a sign/zero extend that sets bits that are never read, > > > then it replaces the sign/zero extension with a narrowing subreg. The > > > narrowing subreg usually gets eliminated by subsequent passes (it's just > > > a copy after all). > > > > > > > Have you tried it on SH, too? (and if so any numbers?)
> Just bootstrap with C regression testing on sh4/sh4eb. No data on > improvements. > Alright. I'll check what it does for SH once it's in. Cheers, Oleg
