Also fix some indentitation inconsistencies.

    PR target/112567

gcc/ChangeLog:

    * config/i386/i386.md (*<any_logic:code>qi_ext<mode>_1_slp):
    Fix generation of invalid RTX in split pattern.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index a364c43641f..f5407ab3054 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -6652,7 +6652,7 @@ (define_insn_and_split "*addqi_ext<mode>_1_slp"
             (subreg:QI
               (match_op_dup 3
                 [(match_dup 2) (const_int 8) (const_int 8)]) 0)
-          (match_dup 0)))
+            (match_dup 0)))
       (clobber (reg:CC FLAGS_REG))])]
   ""
   [(set_attr "type" "alu")
@@ -6666,11 +6666,11 @@ (define_insn_and_split "*addqi_ext<mode>_2_slp"
              [(match_operand 1 "int248_register_operand" "Q")
               (const_int 8)
               (const_int 8)]) 0)
-           (subreg:QI
-             (match_operator:SWI248 4 "extract_operator"
-               [(match_operand 2 "int248_register_operand" "Q")
-                (const_int 8)
-                (const_int 8)]) 0)))
+         (subreg:QI
+           (match_operator:SWI248 4 "extract_operator"
+             [(match_operand 2 "int248_register_operand" "Q")
+              (const_int 8)
+              (const_int 8)]) 0)))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
   "#"
@@ -6685,7 +6685,7 @@ (define_insn_and_split "*addqi_ext<mode>_2_slp"
             (subreg:QI
               (match_op_dup 3
                 [(match_dup 1) (const_int 8) (const_int 8)]) 0)
-          (match_dup 0)))
+            (match_dup 0)))
       (clobber (reg:CC FLAGS_REG))])]
   ""
   [(set_attr "type" "alu")
@@ -7742,11 +7742,11 @@ (define_insn_and_split "*subqi_ext<mode>_2_slp"
              [(match_operand 1 "int248_register_operand" "Q")
               (const_int 8)
               (const_int 8)]) 0)
-           (subreg:QI
-             (match_operator:SWI248 4 "extract_operator"
-               [(match_operand 2 "int248_register_operand" "Q")
-                (const_int 8)
-                (const_int 8)]) 0)))
+         (subreg:QI
+           (match_operator:SWI248 4 "extract_operator"
+             [(match_operand 2 "int248_register_operand" "Q")
+              (const_int 8)
+              (const_int 8)]) 0)))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
   "#"
@@ -11588,8 +11588,8 @@ (define_insn_and_split "*<code>qi_ext<mode>_1_slp"
           (any_logic:QI
             (subreg:QI
               (match_op_dup 3
-                [(match_dup 2) (const_int 8) (const_int 8)]) 0)))
-          (match_dup 0)
+                [(match_dup 2) (const_int 8) (const_int 8)]) 0)
+            (match_dup 0)))
       (clobber (reg:CC FLAGS_REG))])]
   ""
   [(set_attr "type" "alu")
@@ -11603,11 +11603,11 @@ (define_insn_and_split "*<code>qi_ext<mode>_2_slp"
              [(match_operand 1 "int248_register_operand" "Q")
               (const_int 8)
               (const_int 8)]) 0)
-           (subreg:QI
-             (match_operator:SWI248 4 "extract_operator"
-               [(match_operand 2 "int248_register_operand" "Q")
-                (const_int 8)
-                (const_int 8)]) 0)))
+         (subreg:QI
+           (match_operator:SWI248 4 "extract_operator"
+             [(match_operand 2 "int248_register_operand" "Q")
+              (const_int 8)
+              (const_int 8)]) 0)))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
   "#"
@@ -11622,7 +11622,7 @@ (define_insn_and_split "*<code>qi_ext<mode>_2_slp"
             (subreg:QI
               (match_op_dup 3
                 [(match_dup 1) (const_int 8) (const_int 8)]) 0)
-          (match_dup 0)))
+            (match_dup 0)))
       (clobber (reg:CC FLAGS_REG))])]
   ""
   [(set_attr "type" "alu")

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