Pushed to r14-4836. 在 2023/10/20 下午3:15, Lulu Cheng 写道:
LoongArch's microstructure ensures cache consistency by hardware. Due to out-of-order execution, ibar is required to ensure the visibility of the store (invalidated icache) executed by this CPU before ibar (to the instance). ibar will not invalidate the icache, so the start and end parameters are not Affect ibar performance.gcc/ChangeLog: * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition. --- gcc/config/loongarch/loongarch.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h index 22912018a0d..0c15c79bc4c 100644 --- a/gcc/config/loongarch/loongarch.h +++ b/gcc/config/loongarch/loongarch.h @@ -1239,3 +1239,6 @@ struct GTY (()) machine_function#define TARGET_EXPLICIT_RELOCS \(la_opt_explicit_relocs == EXPLICIT_RELOCS_ALWAYS) + +#undef CLEAR_INSN_CACHE +#define CLEAR_INSN_CACHE(beg, end) __builtin_loongarch_ibar (0)
