On 10/9/23 07:37, Juzhe-Zhong wrote:
Like ARM SVE, RVV is vectorizing these 2 cases in the same way.

gcc/testsuite/ChangeLog:

        * gcc.dg/vect/slp-23.c: Add RVV like ARM SVE.
        * gcc.dg/vect/slp-perm-10.c: Ditto.
OK
jeff

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