On 9/27/23 03:26, Joern Rennecke wrote:
I got tired of scan tests failing when they have an underspecified
pattern that matches LTO information, so I did a global replace for
the most common form of such scan patterns in the gcc.target/riscv
testsuite.
regression tested for:
riscv-sim
riscv-sim/-march=rv32gcv_zfh/-mabi=ilp32d/-ftree-vectorize/--param=riscv-autovec-preference=scalable
riscv-sim/-march=rv32imac/-mabi=ilp32
riscv-sim/-march=rv64gcv_zfh_zvfh_zba_zbb_zbc_zicond_zicboz_zawrs/-mabi=lp64d/-ftree-vectorize/--param=riscv-autovec-preferenc
e=scalable
riscv-sim/-march=rv64imac/-mabi=lp64
Committed as obvious.
It would help to describe how these patterns were under specified so
that folks don't continue to make the same mistake as new tests get added.
Jeff
