Hi all, After previous discussion, instead of supporting option -mavx10.1, we will first introduct option -m[no-]evex512, which will enable/disable 512 bit register and 64 bit mask register.
It will not change the current option behavior since if AVX512F is enabled with no evex512 option specified, it will automatically enable 512 bit register and 64 bit mask register. How the patches go comes following: Patch 1 added initial support for option -mevex512. Patch 2-6 refined current intrin file to push evex512 target for all 512 bit intrins. Those scalar intrins remained untouched. Patch 7-11 added OPTION_MASK_ISA2_EVEX512 for all related builtins. Patch 12 disabled zmm register, 512 bit libmvec call for no-evex512, also requested evex512 for vectorization when using 512 bit register. Patch 13-17 supported evex512 in related patterns. Patch 18 added testcases for -mno-evex512 and allowed its usage. The patches currently cause scan-asm fail for pr89229-{5,6,7}b.c since we will emit scalar vmovss here. When trying to use x/ymm 16+ w/o avx512vl but with avx512f+evex512, I suppose we could either emit scalar or zmm instructions. It is quite a rare case on HW since there is no HW w/o avx512vl but with avx512f, so I prefer to not to add maintainence effort here to get a slightly perf improvement. But it could be changed to former behavior. Discussions are welcomed for all the patches. Thx, Haochen Haochen Jiang (18): Initial support for -mevex512 Push evex512 target for 512 bit intrins Push evex512 target for 512 bit intrins Push evex512 target for 512 bit intrins Push evex512 target for 512 bit intrins Push evex512 target for 512 bit intrins Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Disable zmm register and 512 bit libmvec call when !TARGET_EVEX512 Support -mevex512 for AVX512F intrins Support -mevex512 for AVX512DQ intrins Support -mevex512 for AVX512BW intrins Support -mevex512 for AVX512{IFMA,VBMI,VNNI,BF16,VPOPCNTDQ,VBMI2,BITALG,VP2INTERSECT},VAES,GFNI,VPCLMULQDQ intrins Support -mevex512 for AVX512FP16 intrins Allow -mno-evex512 usage gcc/common/config/i386/i386-common.cc | 15 + gcc/config.gcc | 19 +- gcc/config/i386/avx5124fmapsintrin.h | 2 +- gcc/config/i386/avx5124vnniwintrin.h | 2 +- gcc/config/i386/avx512bf16intrin.h | 31 +- gcc/config/i386/avx512bitalgintrin.h | 155 +- gcc/config/i386/avx512bitalgvlintrin.h | 180 + gcc/config/i386/avx512bwintrin.h | 291 +- gcc/config/i386/avx512dqintrin.h | 1840 +- gcc/config/i386/avx512erintrin.h | 2 +- gcc/config/i386/avx512fintrin.h | 19663 +++++++++--------- gcc/config/i386/avx512fp16intrin.h | 8925 ++++---- gcc/config/i386/avx512ifmaintrin.h | 4 +- gcc/config/i386/avx512pfintrin.h | 2 +- gcc/config/i386/avx512vbmi2intrin.h | 4 +- gcc/config/i386/avx512vbmiintrin.h | 4 +- gcc/config/i386/avx512vnniintrin.h | 4 +- gcc/config/i386/avx512vp2intersectintrin.h | 4 +- gcc/config/i386/avx512vpopcntdqintrin.h | 4 +- gcc/config/i386/gfniintrin.h | 76 +- gcc/config/i386/i386-builtin.def | 1312 +- gcc/config/i386/i386-builtins.cc | 96 +- gcc/config/i386/i386-c.cc | 2 + gcc/config/i386/i386-expand.cc | 18 +- gcc/config/i386/i386-options.cc | 33 +- gcc/config/i386/i386.cc | 168 +- gcc/config/i386/i386.h | 7 +- gcc/config/i386/i386.md | 127 +- gcc/config/i386/i386.opt | 4 + gcc/config/i386/immintrin.h | 2 + gcc/config/i386/predicates.md | 3 +- gcc/config/i386/sse.md | 854 +- gcc/config/i386/vaesintrin.h | 4 +- gcc/config/i386/vpclmulqdqintrin.h | 4 +- gcc/testsuite/gcc.target/i386/noevex512-1.c | 13 + gcc/testsuite/gcc.target/i386/noevex512-2.c | 13 + gcc/testsuite/gcc.target/i386/noevex512-3.c | 13 + gcc/testsuite/gcc.target/i386/pr89229-5b.c | 2 +- gcc/testsuite/gcc.target/i386/pr89229-6b.c | 2 +- gcc/testsuite/gcc.target/i386/pr89229-7b.c | 2 +- gcc/testsuite/gcc.target/i386/pr90096.c | 2 +- 41 files changed, 17170 insertions(+), 16738 deletions(-) create mode 100644 gcc/config/i386/avx512bitalgvlintrin.h create mode 100644 gcc/testsuite/gcc.target/i386/noevex512-1.c create mode 100644 gcc/testsuite/gcc.target/i386/noevex512-2.c create mode 100644 gcc/testsuite/gcc.target/i386/noevex512-3.c -- 2.31.1