Committed.
gcc/ChangeLog:
* config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
* config/riscv/vector-iterators.md: New iterator
---
gcc/config/riscv/autovec-vls.md | 8 ++++++++
gcc/config/riscv/vector-iterators.md | 15 +++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/gcc/config/riscv/autovec-vls.md b/gcc/config/riscv/autovec-vls.md
index d208b418e5f..6f48f7d6232 100644
--- a/gcc/config/riscv/autovec-vls.md
+++ b/gcc/config/riscv/autovec-vls.md
@@ -148,6 +148,14 @@
[(set_attr "type" "vmov")
(set_attr "mode" "<MODE>")])
+(define_insn "*mov<mode>_vls"
+ [(set (match_operand:VLSB 0 "register_operand" "=vr")
+ (match_operand:VLSB 1 "register_operand" " vr"))]
+ "TARGET_VECTOR"
+ "vmv1r.v\t%0,%1"
+ [(set_attr "type" "vmov")
+ (set_attr "mode" "<MODE>")])
+
(define_expand "movmisalign<mode>"
[(set (match_operand:VLS 0 "nonimmediate_operand")
(match_operand:VLS 1 "general_operand"))]
diff --git a/gcc/config/riscv/vector-iterators.md
b/gcc/config/riscv/vector-iterators.md
index a98ed9fcbb6..5694c0c8f37 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -2425,6 +2425,21 @@
(V256DF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >=
2048")
(V512DF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_64 && TARGET_MIN_VLEN >=
4096")])
+(define_mode_iterator VLSB [
+ (V1BI "TARGET_VECTOR_VLS")
+ (V2BI "TARGET_VECTOR_VLS")
+ (V4BI "TARGET_VECTOR_VLS")
+ (V8BI "TARGET_VECTOR_VLS")
+ (V16BI "TARGET_VECTOR_VLS")
+ (V32BI "TARGET_VECTOR_VLS")
+ (V64BI "TARGET_VECTOR_VLS && TARGET_MIN_VLEN >= 64")
+ (V128BI "TARGET_VECTOR_VLS && TARGET_MIN_VLEN >= 128")
+ (V256BI "TARGET_VECTOR_VLS && TARGET_MIN_VLEN >= 256")
+ (V512BI "TARGET_VECTOR_VLS && TARGET_MIN_VLEN >= 512")
+ (V1024BI "TARGET_VECTOR_VLS && TARGET_MIN_VLEN >= 1024")
+ (V2048BI "TARGET_VECTOR_VLS && TARGET_MIN_VLEN >= 2048")
+ (V4096BI "TARGET_VECTOR_VLS && TARGET_MIN_VLEN >= 4096")])
+
;; VLS modes that has NUNITS < 32.
(define_mode_iterator VLS_AVL_IMM [
(V1QI "TARGET_VECTOR_VLS")
--
2.36.3
