On Tue, Aug 22, 2023 at 9:24 PM Richard Biener
<richard.guent...@gmail.com> wrote:
>
> On Tue, Aug 22, 2023 at 3:16 PM Jakub Jelinek <ja...@redhat.com> wrote:
> >
> > On Tue, Aug 22, 2023 at 09:02:29PM +0800, Hongtao Liu wrote:
> > > > Agreed. And I still think -mevex512 vs. -mno-evex512 is the best option
> > > > name to represent whether the effective ISA set allows 512-bit vectors
> > > > or
> > > > not. I think -mavx10.1 -mno-avx512cd should be fine. And,
> > > > -mavx10.1-256
> > > > option IMHO should be in the same spirit to all the others a positive
> > > > enablement,
> > > > not both positive (enable avx512{f,cd,bw,dq,...} and negative (disallow
> > > > 512-bit vectors). So, if one uses -mavx512f -mavx10.1-256, because the
> > > > former would allow 512-bit vectors, the latter shouldn't disable those
> > > > again
> > > > because it isn't a -mno-* option. Sure, instructions which are
> > > > specific to
> > > But there's implicit negative (disallow 512-bit vector), I think
> >
> > That is wrong.
> >
> > > -mav512f -mavx10.1-256 or -mavx10.1-256 -mavx512f shouldn't enable
> > > 512-bit vector.
> >
> > Because then the -mavx10.1-256 option behaves completely differently from
> > all the other isa options.
> >
> > We have the -march= options which are processed separately, but the normal
> > ISA options either only enable something (when -mwhatever), or only disable
> > something
> > (when -mno-whatever). -mavx512f -mavx10.1-256 should be a union of those
> > ISAs, like say -mavx2 -mbmi is, not an intersection or something even
> > harder to understand.
> >
> > > Further, we should disallow a mix of exex512 and non-evex512 (e.g.
> > > -mavx10.1-512 -mavx10.2-256),they should be a unified separate switch
> > > that either disallows both or allows both. Instead of some isa
> > > allowing it and some isa disallowing it.
> >
> > No, it will be really terrible user experience if the new options behave
> > completely differently from everything else. Because then we'll need to
Ok, then we can't avoid TARGET_AVX10_1 in those existing 256/128-bit
evex instruction patterns.
> > document it in detail how it behaves and users will have hard time to figure
> > it out, and specify what it does not just on the command line, but also when
> > mixing with target attribute or pragmas. -mavx10.1-512 -mavx10.2-256 should
> > be a union of those two ISAs. Either internally there is an ISA flag
> > whether
> > the instructions in the avx10.2 ISA but not avx10.1 ISA can operate on
> > 512-bit vectors or not, in that case -mavx10.1-512 -mavx10.2-256 should
> > enable the AVX10.1 set including 512-bit vectors + just the < 512-bit
> > instructions from the 10.1 to 10.2 delta, or if there is no such separation
> > internally, it will just enable full AVX10.2-512. User has asked for it.
>
> I think having all three -mavx10.1, -mavx10.1-256 and -mavx10.1-512 is just
> confusing. Please separate ISA (avx10.1) from size. If -m[no-]evex512 isn't
> good propose something else. -mavx512f will enable 512bits, -mavx10.1
> will not unless -mevex512. -mavx512f -mavx512vl -mno-evex512 will disable
> 512bits.
>
> So scrap -mavx10.1-256 and -mavx10.1-512 please.
It sounds to me we would have something like
avx512XXX
^
|
"independent": TARGET_AVX512VL || TARGET_AVX10_1 will enable
128/256-bit instruction.
|
avx10.1-256 <----implied---- avx10.1-512
^ ^
| |
| |
implied implied
| |
| |
avx10.2-256 <----implied -----avx10.2-512
^ ^
| |
| |
implied Implied
| |
| |
avx10.3-256 <---implied-------avx10.3-512
.....
And put every existing and new instruction under those flags
>
> Richard.
>
> > Jakub
> >
--
BR,
Hongtao
